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Date:   Wed, 30 Nov 2022 11:29:40 +0530
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        <spatton@ti.com>, Pavan Chebbi <pavan.chebbi@broadcom.com>,
        <s-vadapalli@ti.com>
Subject: Re: [PATCH net] net: ethernet: ti: am65-cpsw: Fix RGMII configuration
 at SPEED_10
Content-Language: en-US
To:     Vladimir Oltean <vladimir.oltean@nxp.com>
References: <20221129050639.111142-1-s-vadapalli@ti.com>
 <CALs4sv29ZdyK-k0d9_FrRPd_v_6GrC_NU_dYnU5rLWmYxVM2Zg@mail.gmail.com>
 <20221129164619.mq3b4y4cxj2vvl24@skbuf>
From:   Siddharth Vadapalli <s-vadapalli@ti.com>
In-Reply-To: <20221129164619.mq3b4y4cxj2vvl24@skbuf>
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Hello,

On 29/11/22 22:16, Vladimir Oltean wrote:
> On Tue, Nov 29, 2022 at 11:16:42AM +0530, Pavan Chebbi wrote:
>> Looks like this patch should be directed to net-next?
> 
> Do you know more about what CPSW_SL_CTL_EXT_EN does, exactly? I'm not
> able to assess the impact of the bug being fixed. What doesn't work?
> Maybe Siddharth could put more focus on that.

The CPSW_SL_CTL_EXT_EN bit is used to control in-band mode v/s forced
mode of operation. Setting the bit selects in-band mode while clearing
it selects forced mode. Thus, if the bit isn't set for certain variants
of RGMII mode, then those variants of RGMII mode will not work in
in-band mode of operation.

Please refer to the patch at [1] which corresponds to the commit being
fixed. That patch intended to convert the existing driver to utilize the
PHYLINK framework. In that process, the following line:
if (phy->speed == 10 && phy_interface_is_rgmii(phy))
was removed from the am65_cpsw_nuss_adjust_link() function and added in
the am65_cpsw_nuss_mac_link_up() function in the same patch as:
if (speed == SPEED_10 && interface == PHY_INTERFACE_MODE_RGMII)
instead of:
if (speed == SPEED_10 && phy_interface_mode_is_rgmii(interface))

Due to the above, the already existing support for in-band mode of
operation for all RGMII mode variants was accidentally changed to
support for in-band mode of operation for just the
PHY_INTERFACE_MODE_RGMII variant.

[1]
https://patchwork.kernel.org/project/netdevbpf/patch/20220309075944.32166-1-s-vadapalli@ti.com/

Regards,
Siddharth.