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Message-ID: <efa90f10-db67-bb9f-03fd-e99695a5bdf5@socionext.com>
Date:   Wed, 30 Nov 2022 17:59:59 +0900
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Subject: Re: [PATCH 2/8] dt-bindings: soc: socionext: Add UniPhier SoC-glue
 logic
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To:     Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc:     Masami Hiramatsu <mhiramat@kernel.org>, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
References: <20221129103509.9958-1-hayashi.kunihiko@socionext.com>
 <20221129103509.9958-3-hayashi.kunihiko@socionext.com>
 <4e90944a-1200-4619-f977-590fe2919017@linaro.org>
From:   Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
In-Reply-To: <4e90944a-1200-4619-f977-590fe2919017@linaro.org>
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Hi Krzysztof,

On 2022/11/29 23:43, Krzysztof Kozlowski wrote:
> On 29/11/2022 11:35, Kunihiko Hayashi wrote:
>> Add devicetree binding schema for the SoC-glue logic implemented on
>> Socionext Uniphier SoCs.
>>
>> This SoC-glue logic is a set of miscellaneous function registers
>> handling signals for specific devices outside system components,
>> and also has multiple functions such as I/O pinmux, usb-phy, debug,
>> clock-mux for a specific SoC, and so on.
>>
>> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
>> ---
>>   .../socionext,uniphier-soc-glue.yaml          | 94 +++++++++++++++++++
>>   1 file changed, 94 insertions(+)
>>   create mode 100644
>> Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml
>>
>> diff --git
>> a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml
>> b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml
>> new file mode 100644
>> index 000000000000..3f571e3e1339
>> --- /dev/null
>> +++
>> b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml
>> @@ -0,0 +1,94 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id:
>> http://devicetree.org/schemas/soc/socionext/socionext,uniphier-soc-glue.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Socionext UniPhier SoC-glue logic
>> +
>> +maintainers:
>> +  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
>> +
>> +description: |+
>> +  SoC-glue logic implemented on Socionext UniPhier SoCs is a collection
>> of
>> +  miscellaneous function registers handling signals outside system
>> components.
>> +
>> +properties:
>> +  compatible:
>> +    items:
>> +      - enum:
>> +          - socionext,uniphier-ld4-soc-glue
>> +          - socionext,uniphier-pro4-soc-glue
>> +          - socionext,uniphier-pro5-soc-glue
>> +          - socionext,uniphier-pxs2-soc-glue
>> +          - socionext,uniphier-ld6b-soc-glue
>> +          - socionext,uniphier-sld8-soc-glue
>> +          - socionext,uniphier-ld11-soc-glue
>> +          - socionext,uniphier-ld20-soc-glue
>> +          - socionext,uniphier-pxs3-soc-glue
>> +          - socionext,uniphier-nx1-soc-glue
>> +          - socionext,uniphier-soc-glue
> 
> This one looks generic - why having it next to specific ones?

SoC-glue has the same register set, but different implementations
for each SoC.
I thought of defining the same register set as a common specs,
but each compatibles are sufficient. I'll remove it.

> Same question for your previous patch - socionext,uniphier-sysctrl.
> 
> And similarly to previous patch, do you expect child nodes everywhere?

In case of this SoC-glue logic, all SoCs has pinctrl, however,
only SoCs with USB2 host has usb-controller (phy-hub).
And only legacy SoCs implement clock-controller (clk-mux) here.

Should child nodes that exist only in a specific "compatible" be defined
conditionally?

>> +      - const: simple-mfd
>> +      - const: syscon
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +patternProperties:
>> +  "^pinctrl(@[0-9a-f]+)?$":
>> +    $ref: /schemas/pinctrl/socionext,uniphier-pinctrl.yaml#
>> +
>> +  "^usb-controller(@[0-9a-f]+)?$":
>> +    $ref: /schemas/phy/socionext,uniphier-usb2-phy.yaml#
>> +
>> +  "^clock-controller(@[0-9a-f]+)?$":
>> +    $ref: /schemas/clock/socionext,uniphier-clock.yaml#
>> +

Thank you,

---
Best Regards
Kunihiko Hayashi