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Peter Anvin" , Kim Phillips , linux-perf-users@vger.kernel.org, kernel-janitors@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-17.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, ENV_AND_HDR_SPF_MATCH,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, USER_IN_DEF_DKIM_WL,USER_IN_DEF_SPF_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Dec 2, 2022 at 5:52 AM Colin Ian King wrote: > > The left shift of int 32 bit integer constant 1 is evaluated using 32 bit > arithmetic and then passed as a 64 bit function argument. In the case where > i is 32 or more this can lead to an overflow. Avoid this by shifting > using the BIT_ULL macro instead. > > Fixes: 471af006a747 ("perf/x86/amd: Constrain Large Increment per Cycle events") > Signed-off-by: Colin Ian King Acked-by: Ian Rogers Thanks, Ian > --- > arch/x86/events/amd/core.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c > index d6f3703e4119..4386b10682ce 100644 > --- a/arch/x86/events/amd/core.c > +++ b/arch/x86/events/amd/core.c > @@ -1387,7 +1387,7 @@ static int __init amd_core_pmu_init(void) > * numbered counter following it. > */ > for (i = 0; i < x86_pmu.num_counters - 1; i += 2) > - even_ctr_mask |= 1 << i; > + even_ctr_mask |= BIT_ULL(i); > > pair_constraint = (struct event_constraint) > __EVENT_CONSTRAINT(0, even_ctr_mask, 0, > -- > 2.38.1 >