Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Date:   Fri, 2 Dec 2022 18:18:21 +0000
From:   Conor Dooley <conor@kernel.org>
To:     Palmer Dabbelt <palmer@dabbelt.com>
Cc:     hal.feng@starfivetech.com, linux-riscv@lists.infradead.org,
        devicetree@vger.kernel.org, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org,
        Paul Walmsley <paul.walmsley@sifive.com>,
        aou@eecs.berkeley.edu, ben.dooks@sifive.com, tglx@linutronix.de,
        Marc Zyngier <maz@kernel.org>, sboyd@kernel.org,
        mturquette@baylibre.com, p.zabel@pengutronix.de,
        linus.walleij@linaro.org, emil.renner.berthing@canonical.com,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 8/8] RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW
Message-ID: <Y4pBbVQgcTmS7NLa@spud>
References: <Y4o+5ayW0vHcmvo6@spud>
 <mhng-2ff22bb7-a48a-4434-b498-1f928e75cd01@palmer-ri-x1c9a>
MIME-Version: 1.0
Content-Type: multipart/signed; micalg=pgp-sha256;
        protocol="application/pgp-signature"; boundary="7L3VJsXTTTjO0p6i"
Content-Disposition: inline
In-Reply-To: <mhng-2ff22bb7-a48a-4434-b498-1f928e75cd01@palmer-ri-x1c9a>
Precedence: bulk


--7L3VJsXTTTjO0p6i
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
Content-Transfer-Encoding: quoted-printable

On Fri, Dec 02, 2022 at 10:13:40AM -0800, Palmer Dabbelt wrote:
> On Fri, 02 Dec 2022 10:07:33 PST (-0800), Conor Dooley wrote:
> > On Fri, Dec 02, 2022 at 10:00:35AM -0800, Palmer Dabbelt wrote:
> > > On Thu, 17 Nov 2022 17:17:14 PST (-0800), hal.feng@starfivetech.com w=
rote:
> > > > Add CONFIG_SERIAL_8250_DW=3Dy, which is a necessary option for
> > > > StarFive JH7110 and JH7100 SoCs to boot with serial ports.
> > > > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> > > > Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> > > > ---
> > > >  arch/riscv/configs/defconfig | 1 +
> > > >  1 file changed, 1 insertion(+)
> > > > > diff --git a/arch/riscv/configs/defconfig
> > > b/arch/riscv/configs/defconfig
> > > > index 05fd5fcf24f9..a23d022974ad 100644
> > > > --- a/arch/riscv/configs/defconfig
> > > > +++ b/arch/riscv/configs/defconfig
> > > > @@ -122,6 +122,7 @@ CONFIG_MICROSEMI_PHY=3Dy
> > > >  CONFIG_INPUT_MOUSEDEV=3Dy
> > > >  CONFIG_SERIAL_8250=3Dy
> > > >  CONFIG_SERIAL_8250_CONSOLE=3Dy
> > > > +CONFIG_SERIAL_8250_DW=3Dy
> > > >  CONFIG_SERIAL_OF_PLATFORM=3Dy
> > > >  CONFIG_VIRTIO_CONSOLE=3Dy
> > > >  CONFIG_HW_RANDOM=3Dy
> > >=20
> > > Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
> >=20
> > Hey Palmer, could you take this as v6.2 material instead of Acking it
> > please? It applies to the jh7100 stuff that's already in-tree.
>=20
> Ya, no problem.  Just this patch, or the whole series?

Just this one defconfig patch please, the rest is not ready.
Sorry that that was not clear,
Conor.


--7L3VJsXTTTjO0p6i
Content-Type: application/pgp-signature; name="signature.asc"

-----BEGIN PGP SIGNATURE-----

iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCY4pBbQAKCRB4tDGHoIJi
0okIAP9ezsc7DcLYtKQL0YkiR3kU1YHRvLyrceTr5zvR4AdD/AD+Jakh5oJMOQZs
TT+FQynSHpyucTXuOOlHyDjvaiZKNAM=
=tjcn
-----END PGP SIGNATURE-----

--7L3VJsXTTTjO0p6i--