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From:   Bin Meng <bmeng@tinylab.org>
To:     linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
        linux-serial@vger.kernel.org
Cc:     Albert Ou <aou@eecs.berkeley.edu>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Jiri Slaby <jirislaby@kernel.org>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Paul Walmsley <paul.walmsley@sifive.com>
Subject: [PATCH 1/2] serial: Adapt Arm semihosting earlycon driver to RISC-V
Date:   Mon,  5 Dec 2022 13:00:37 +0800
Message-Id: <20221205050038.195746-1-bmeng@tinylab.org>
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Feedback-ID: bizesmtp:tinylab.org:qybglogicsvr:qybglogicsvr3
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Per RISC-V semihosting spec [1], adapt the existing Arm semihosting
earlycon driver to RISC-V.

[1] https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc

Signed-off-by: Bin Meng <bmeng@tinylab.org>
---

 drivers/tty/serial/Kconfig                 |  2 +-
 drivers/tty/serial/earlycon-arm-semihost.c | 17 ++++++++++++++++-
 2 files changed, 17 insertions(+), 2 deletions(-)

diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 434f83168546..e94d1265151c 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -75,7 +75,7 @@ config SERIAL_AMBA_PL011_CONSOLE
 
 config SERIAL_EARLYCON_ARM_SEMIHOST
 	bool "Early console using ARM semihosting"
-	depends on ARM64 || ARM
+	depends on ARM64 || ARM || RISCV
 	select SERIAL_CORE
 	select SERIAL_CORE_CONSOLE
 	select SERIAL_EARLYCON
diff --git a/drivers/tty/serial/earlycon-arm-semihost.c b/drivers/tty/serial/earlycon-arm-semihost.c
index fcdec5f42376..25a0f91926a3 100644
--- a/drivers/tty/serial/earlycon-arm-semihost.c
+++ b/drivers/tty/serial/earlycon-arm-semihost.c
@@ -6,6 +6,10 @@
  * Adapted for ARM and earlycon:
  * Copyright (C) 2014 Linaro Ltd.
  * Author: Rob Herring <robh@kernel.org>
+ *
+ * Adapted for RISC-V and earlycon:
+ * Copyright (C) 2022 tinylab.org
+ * Author: Bin Meng <bmeng@tinylab.org>
  */
 #include <linux/kernel.h>
 #include <linux/console.h>
@@ -23,7 +27,18 @@
  */
 static void smh_putc(struct uart_port *port, unsigned char c)
 {
-#ifdef CONFIG_ARM64
+#if defined(CONFIG_RISCV)
+	asm volatile("addi    a1, %0, 0\n"
+		     "addi    a0, zero, 3\n"
+		     ".balign 16\n"
+		     ".option push\n"
+		     ".option norvc\n"
+		     "slli    zero, zero, 0x1f\n"
+		     "ebreak\n"
+		     "srai    zero, zero, 0x7\n"
+		     ".option pop\n"
+		     : : "r" (&c) : "a0", "a1", "memory");
+#elif defined(CONFIG_ARM64)
 	asm volatile("mov  x1, %0\n"
 		     "mov  x0, #3\n"
 		     "hlt  0xf000\n"
-- 
2.34.1