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[2620:137:e000::1:20]) by mx.google.com with ESMTP id wu9-20020a170906eec900b007a4feae7adfsi7894756ejb.565.2022.12.04.23.01.55; Sun, 04 Dec 2022 23:02:16 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b="c/i6iwBJ"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231599AbiLEG6v (ORCPT + 84 others); Mon, 5 Dec 2022 01:58:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38058 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231497AbiLEG6Y (ORCPT ); Mon, 5 Dec 2022 01:58:24 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B41D96585; Sun, 4 Dec 2022 22:58:22 -0800 (PST) X-UUID: b207963b87514c1c892af3466435d722-20221205 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=b2WSZ3CeVel7jtK8eB9zexq5s0JpdBbozdst3aQS8gk=; b=c/i6iwBJGQicGSiS2ceTvhTu44Z+zLUK8LGR9u69OEUIl/FaSa3i03VsuQbnkBcC8BbNyEYygKdUWabgHEKsPZypNv5RAq/lry5mrVKGIfduRmO9fy4/TPSfVPRmso76h5SK07MM27laFOMNvAmjavNlaaB1AU5f+7Fj/jZZcN4=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.14,REQID:e4695202-b347-4f33-b499-ff88edb05658,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:dcaaed0,CLOUDID:b8a1291f-5e1d-4ab5-ab8e-3e04efc02b30,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: b207963b87514c1c892af3466435d722-20221205 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1698312840; Mon, 05 Dec 2022 14:58:17 +0800 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Mon, 5 Dec 2022 14:58:15 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Mon, 5 Dec 2022 14:58:14 +0800 From: Xiangsheng Hou To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Mark Brown , Chuanhong Guo CC: Xiangsheng Hou , , , , , , , , Subject: [PATCH v2 7/9] dt-bindings: spi: mtk-snfi: Add read latch latency property Date: Mon, 5 Dec 2022 14:57:54 +0800 Message-ID: <20221205065756.26875-8-xiangsheng.hou@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221205065756.26875-1-xiangsheng.hou@mediatek.com> References: <20221205065756.26875-1-xiangsheng.hou@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add mediatek,rx-latch-latency property which adjust read delay in the unit of clock cycle. Signed-off-by: Xiangsheng Hou --- .../devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml index bab23f1b11fd..6e6ff8d73fcd 100644 --- a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml +++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml @@ -45,6 +45,13 @@ properties: description: device-tree node of the accompanying ECC engine. $ref: /schemas/types.yaml#/definitions/phandle + mediatek,rx-latch-latency: + description: Rx delay to sample data with this value, the value + unit is clock cycle. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2, 3] + default: 0 + required: - compatible - reg -- 2.25.1