Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Message-ID: <6e0dcfa8-6855-cc80-5e23-443d44cae07b@linaro.org>
Date:   Mon, 5 Dec 2022 09:40:16 +0100
MIME-Version: 1.0
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101
 Thunderbird/102.4.2
From:   Neil Armstrong <neil.armstrong@linaro.org>
Reply-To: neil.armstrong@linaro.org
Subject: Re: [PATCH] arm64: defconfig: Add Meson DDR PMU as module
Content-Language: en-US
To:     Jiucheng Xu <jiucheng.xu@amlogic.com>,
        Catalin Marinas <catalin.marinas@arm.com>,
        Will Deacon <will@kernel.org>
Cc:     Jianxin Pan <jianxin.pan@amlogic.com>,
        Kelvin Zhang <kelvin.zhang@amlogic.com>,
        Chris Healy <cphealy@gmail.com>,
        Chris Healy <healych@amazon.com>,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        "linux-amlogic@lists.infradead.org" 
        <linux-amlogic@lists.infradead.org>
References: <20221204043530.1673752-1-jiucheng.xu@amlogic.com>
Organization: Linaro Developer Services
In-Reply-To: <20221204043530.1673752-1-jiucheng.xu@amlogic.com>
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 7bit
Precedence: bulk

+CC linux-amlogic@lists.infradead.org

On 04/12/2022 05:35, Jiucheng Xu wrote:
> Add Meson DDR PMU to defconfig so that build errors are caught.
> 
> Signed-off-by: Jiucheng Xu <jiucheng.xu@amlogic.com>
> ---
>   arch/arm64/configs/defconfig | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index 0b6af3348e79..f2324b54a6ba 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -1265,6 +1265,7 @@ CONFIG_ARM_DMC620_PMU=m
>   CONFIG_QCOM_L2_PMU=y
>   CONFIG_QCOM_L3_PMU=y
>   CONFIG_HISI_PMU=y
> +CONFIG_MESON_DDR_PMU=m
>   CONFIG_NVMEM_IMX_OCOTP=y
>   CONFIG_NVMEM_IMX_OCOTP_SCU=y
>   CONFIG_NVMEM_MTK_EFUSE=y