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[2001:1ae9:1c2:4c00:748:2a9a:a2a6:1362]) by smtp.gmail.com with ESMTPSA id kw26-20020a170907771a00b00783f32d7eaesm6264724ejc.164.2022.12.05.06.57.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Dec 2022 06:57:10 -0800 (PST) Date: Mon, 5 Dec 2022 15:57:10 +0100 From: Andrew Jones To: Jisheng Zhang Cc: Palmer Dabbelt , Paul Walmsley , Albert Ou , Anup Patel , Atish Patra , Heiko Stuebner , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: Re: [PATCH v2 01/13] riscv: fix jal offsets in patched alternatives Message-ID: <20221205145710.xzb4prrc44gv7mwm@kamzik> References: <20221204174632.3677-1-jszhang@kernel.org> <20221204174632.3677-2-jszhang@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221204174632.3677-2-jszhang@kernel.org> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Dec 05, 2022 at 01:46:20AM +0800, Jisheng Zhang wrote: > Alternatives live in a different section, so offsets used by jal > instruction will point to wrong locations after the patch got applied. > > Similar to arm64, adjust the location to consider that offset. > > Signed-off-by: Jisheng Zhang > --- > arch/riscv/include/asm/alternative.h | 2 ++ > arch/riscv/kernel/alternative.c | 38 ++++++++++++++++++++++++++++ > arch/riscv/kernel/cpufeature.c | 3 +++ > 3 files changed, 43 insertions(+) > > diff --git a/arch/riscv/include/asm/alternative.h b/arch/riscv/include/asm/alternative.h > index c58ec3cc4bc3..33eae9541684 100644 > --- a/arch/riscv/include/asm/alternative.h > +++ b/arch/riscv/include/asm/alternative.h > @@ -29,6 +29,8 @@ void apply_module_alternatives(void *start, size_t length); > > void riscv_alternative_fix_auipc_jalr(void *alt_ptr, unsigned int len, > int patch_offset); > +void riscv_alternative_fix_jal(void *alt_ptr, unsigned int len, > + int patch_offset); > > struct alt_entry { > void *old_ptr; /* address of original instruciton or data */ > diff --git a/arch/riscv/kernel/alternative.c b/arch/riscv/kernel/alternative.c > index 292cc42dc3be..9d88375624b5 100644 > --- a/arch/riscv/kernel/alternative.c > +++ b/arch/riscv/kernel/alternative.c > @@ -125,6 +125,44 @@ void riscv_alternative_fix_auipc_jalr(void *alt_ptr, unsigned int len, > } > } > > +#define to_jal_imm(value) \ > + (((value & (RV_J_IMM_10_1_MASK << RV_J_IMM_10_1_OFF)) << RV_I_IMM_11_0_OPOFF) | \ ^ RV_J_IMM_10_1_OPOFF > + ((value & (RV_J_IMM_11_MASK << RV_J_IMM_11_OFF)) << RV_J_IMM_11_OPOFF) | \ > + ((value & (RV_J_IMM_19_12_OPOFF << RV_J_IMM_19_12_OFF)) << RV_J_IMM_19_12_OPOFF) | \ > + ((value & (1 << RV_J_IMM_SIGN_OFF)) << RV_J_IMM_SIGN_OPOFF)) Should put () around value > + > +void riscv_alternative_fix_jal(void *alt_ptr, unsigned int len, > + int patch_offset) > +{ > + int num_instr = len / sizeof(u32); > + unsigned int call; > + int i; > + int imm; > + > + for (i = 0; i < num_instr; i++) { > + u32 inst = riscv_instruction_at(alt_ptr, i); > + > + if (!riscv_insn_is_jal(inst)) > + continue; > + > + /* get and adjust new target address */ > + imm = RV_EXTRACT_JTYPE_IMM(inst); > + imm -= patch_offset; > + > + /* pick the original jal */ > + call = inst; > + > + /* drop the old IMMs, all jal imm bits sit at 31:12 */ > + call &= ~GENMASK(31, 12); It'd be nice if this had a define. > + > + /* add the adapted IMMs */ > + call |= to_jal_imm(imm); > + > + /* patch the call place again */ > + patch_text_nosync(alt_ptr + i * sizeof(u32), &call, 4); > + } > +} > + > /* > * This is called very early in the boot process (directly after we run > * a feature detect on the boot CPU). No need to worry about other CPUs > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c > index ba62a4ff5ccd..c743f0adc794 100644 > --- a/arch/riscv/kernel/cpufeature.c > +++ b/arch/riscv/kernel/cpufeature.c > @@ -324,6 +324,9 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin, > riscv_alternative_fix_auipc_jalr(alt->old_ptr, > alt->alt_len, > alt->old_ptr - alt->alt_ptr); > + riscv_alternative_fix_jal(alt->old_ptr, > + alt->alt_len, > + alt->old_ptr - alt->alt_ptr); > } > } > } > -- > 2.37.2 > Thanks, drew