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Content-Language: en-US To: Christoph Hellwig Cc: Jason Gunthorpe , Lei Rao , kbusch@kernel.org, axboe@fb.com, kch@nvidia.com, sagi@grimberg.me, alex.williamson@redhat.com, cohuck@redhat.com, yishaih@nvidia.com, shameerali.kolothum.thodi@huawei.com, kevin.tian@intel.com, mjrosato@linux.ibm.com, linux-kernel@vger.kernel.org, linux-nvme@lists.infradead.org, kvm@vger.kernel.org, eddie.dong@intel.com, yadong.li@intel.com, yi.l.liu@intel.com, Konrad.wilk@oracle.com, stephen@eideticom.com, hang.yuan@intel.com References: <20221206061940.GA6595@lst.de> <20221206135810.GA27689@lst.de> <20221206153811.GB2266@lst.de> <20221206165503.GA8677@lst.de> <20221207075415.GB2283@lst.de> <4f11e0bb-e090-bf9b-4f98-578273865200@nvidia.com> <20221207134644.GB21691@lst.de> From: Max Gurtovoy In-Reply-To: <20221207134644.GB21691@lst.de> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: LO2P265CA0255.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:8a::27) To DM4PR12MB5040.namprd12.prod.outlook.com (2603:10b6:5:38b::19) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR12MB5040:EE_|LV2PR12MB5847:EE_ X-MS-Office365-Filtering-Correlation-Id: e0332c3d-2158-489f-5ac7-08dad862573e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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But that interface needs to > centered around the controlling function for all the reasons I've > written down multiple times now. > >> It's just an implementation detail. > No, it's not. While you could come up with awkward ways to map how > the hardware interface must work to a completely contrary kernel > interface that's just going to create the need for lots of boilerplate > code _and_ confuses users. The function that is beeing migrated can > fundamentally not be in control of itself. Any interface that pretends > it is broken and a long term nightmare for users and implementers. We're defining the SPEC and interfaces now :) Bellow is some possible direction I can think of. >> I feel like it's even sounds more reasonable to have a common API like we >> have today to save_state/resume_state/quiesce_device/freeze_device and each >> device implementation will translate this functionality to its own SPEC. > Absolutely. > >> If I understand your direction is to have QEMU code to talk to >> nvmecli/new_mlx5cli/my_device_cli to do that and I'm not sure it's needed. > No. great. > >> The controlled device is not aware of any of the migration process. Only >> the migration SW, system admin and controlling device. > Exactly. > >> So in the source: >> >> 1. We enable SRIOV on the NVMe driver > Again. Nothing in live migration is tied to SR-IOV at all. SR-IOV > is just one way to get multiple functions. Sure. It's just an example. It can be some mdev. > >> 2. We list all the secondary controllers: nvme1, nvme2, nvme3 >> >> 3. We allow migrating nvme1, nvme2, nvme3 - now these VFs are migratable >> (controlling to controlled). >> >> 4. We bind nvme1, nvme2, nvme3 to VFIO NVMe driver >> >> 5. We pass these functions to VM > And you need to pass the controlling function (or rather a handle for > it), because there is absolutely no sane way to discover that from > the controlled function as it can't have that information by the > fact that it is beeing passed to unprivilged VMs. Just thinking out loud: When we perform step #3 we are narrowing it's scope and maybe some caps that you're concerned of. After this setting, the controlled function is in LM mode (we should define what does that mean in order to be able to migrate it correctly) and the controlling function is the migration master of it. Both can be aware of that. The only one that can master the controlled function is the controlling function in LM mode. Thus, it will be easy to keep that handle inside the kernel for VFs and for MDEVs as well. Although I'm not against passing this handle to migration SW somehow in the command line of the QEMU but I still can't completely agree it's necessary.