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Date:   Wed, 7 Dec 2022 15:41:11 +0000
From:   "Russell King (Oracle)" <linux@armlinux.org.uk>
To:     Andrew Lunn <andrew@lunn.ch>
Cc:     Jonathan =?iso-8859-1?Q?Neusch=E4fer?= <j.neuschaefer@gmx.net>,
        linux-arm-kernel@lists.infradead.org,
        Robert Jarzmik <robert.jarzmik@free.fr>,
        Haojian Zhuang <haojian.zhuang@gmail.com>,
        Daniel Mack <daniel@zonque.org>, linux-kernel@vger.kernel.org
Subject: Re: PXA25x: GPIO driver fails probe due to resource conflict with
 pinctrl driver
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 <Y5CxBzy47Gjn/V5a@lunn.ch>
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Sender: Russell King (Oracle) <linux@armlinux.org.uk>
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On Wed, Dec 07, 2022 at 04:28:07PM +0100, Andrew Lunn wrote:
> On Wed, Dec 07, 2022 at 12:25:53PM +0100, Jonathan Neusch?fer wrote:
> > Hello,
> > 
> > I am currently trying to bring up Linux 6.1-rcX on a PXA255 board, using a
> > devicetree. One problem I encountered is that the PXA GPIO driver fails to
> > probe because it uses the same MMIO register range as the pinctrl driver:
> > 
> > [    0.666169] pxa25x-pinctrl 40e00054.pinctrl: initialized pxa2xx pinctrl driver
> > [    0.694407] pxa-gpio 40e00000.gpio: can't request region for resource [mem 0x40e00000-0x40e0ffff]
> > [    0.695050] pxa-gpio: probe of 40e00000.gpio failed with error -16
> > 
> > Before I try to fix this myself: Is GPIO on PXA25x currently expected to
> > work and when has it last been seen working?
> > 
> > What would be a good way to fix this?
> 
> How are the registers arranged?

As documented in drivers/gpio/gpio-pxa.c - it'll be easier for you to
look there rather than for me to explain it - but suffice it to say
that the pinctrl registers are amongst the GPIO registers.

> Is 0x40e00000-0x40e0ffff simply too
> large, and making it smaller would fix the issue? Or are the registers
> interleaved?

They're interleaved. Looking at the .dtsi file for PXA25x, it seems
that the pinctrl claims just the addresses that it needs, but the GPIO
controller has no reg property in the .dtsi, so I'm not sure what fills
that information in.

DT could describe the region for PXA25x, which is just:

	0x40e00000 - 0x40e00054

Later PXA have more banks, so would require additional resources to be
listed.

However, first, we need to know what provides the iomem resource for
this:

                gpio: gpio@40e00000 {
                        compatible = "intel,pxa25x-gpio";
                        gpio-ranges = <&pinctrl 0 0 84>;
                        clocks = <&clks CLK_NONE>;
                };

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