Received: by 2002:a05:6358:d09b:b0:dc:cd0c:909e with SMTP id jc27csp125516rwb; Wed, 7 Dec 2022 15:29:42 -0800 (PST) X-Google-Smtp-Source: AA0mqf7jdNGKn6R2u8bF7GXd8n1aS254h2JEm2Uk4rb/GL2xdpwOhnEQeTwJiB7lGcA8UR1nKi07 X-Received: by 2002:a17:90b:e05:b0:219:f9d6:2bbf with SMTP id ge5-20020a17090b0e0500b00219f9d62bbfmr10485715pjb.42.1670455782097; Wed, 07 Dec 2022 15:29:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670455782; cv=none; d=google.com; s=arc-20160816; b=oP/BR7AS8tBiynuEwWga6maz9E9O2rdoge+m/GtmFTWFlljnllEmaH8mLHEFB91Ab4 v2aJaJP5X2YNT+5Qs41swGVAAZMqH9zs2fzDv+K8ATrgb1x+26iezKCEErN1LkferjKV BpAQ3my2qUJqiYdCvmjZzi0+9L4ET0yp7h5VsFJ6C9HRv1iapIcJQ1V6atwqa0aVAnvy TieASouoG6IsbHLHP1qW+YorqPhMUtfEQZpJkxt+50f3dhacYh9Dd0HJcY0sCSze5q4F IhE9pWBMqxiRf0pupETtXepDIhlwWhcuaq+mndIZGFdgEz50DTFj68h84oTpqm9FNKF2 WpAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=47TLykqIITSdGYtTHlB+YFOrKRysxK15SkR7QvhFnkU=; b=ZyutHymhTkbyUenfWTtivbiWUnbGnkjREua1p5zihrNgFWeAg+zncGVCVus9PrppTo tmjpChpY4kdj49Rw2UZFQyajPyCN4gu5R6KXRBvKn/RFLA6XtNMkrOXknyqTbXAIzhWa o25WFIJtgTrUhjodnBP/TATM/o6m0If4mgdlaY6iiOsKWS2cbsyDBb7SjGnh+/CKFzIf USYmFfXIXPp8azc/ZWXjysLDw+ZW8FPkaq3uh7Dk282/PldOgweS1yVTPV0QhyrDrmrb cAzbkAeYBUsIMak50XncRtLj+EZj6vFsSAcTB08eS9YhjWUt4MSU61f7PxD/0UVPnvtB l7YA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="R4bj3/ty"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id m6-20020a170902db0600b001783ba6f79dsi9643024plx.494.2022.12.07.15.29.32; Wed, 07 Dec 2022 15:29:42 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="R4bj3/ty"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229898AbiLGWwj (ORCPT + 74 others); Wed, 7 Dec 2022 17:52:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45014 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229847AbiLGWwa (ORCPT ); Wed, 7 Dec 2022 17:52:30 -0500 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 78C7B5C76C; Wed, 7 Dec 2022 14:52:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670453549; x=1701989549; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=t2DafPPSBT9Ml5FRPIZEHIKvXe0wTNw4tCplQE2Vzac=; b=R4bj3/ty52OZ0gSGzG2PUAksCVSmcDe1ZLUUjxnSh63s2V3GTONwb8ZA gZEC7ZO7wYcMrvLGpjg1Sras81vy6WqryUFcZPPtfNBTU/grFTkdm2459 HE6Xe1MNTHwPb88ppJ7V2hoSm2dYID0DSTaxPENIJlCuJhAZGdGymjo5d Rpa+eDYJpj4EEeaMqV7lfj6m9SDItyl8IavnmhQG0JmGIEyjZzo2ae3jC pevg2vv0PWgbcTUQDHkdAX15Q8aIyNHBaxMb2iM/AGMYS5+rC4PBkj00q Ul4sD8fBP/5HY6klauiHwAqJKMobO5KDpfqyvrIPpu6pDzwq0ADn15PDJ g==; X-IronPort-AV: E=McAfee;i="6500,9779,10554"; a="300439518" X-IronPort-AV: E=Sophos;i="5.96,225,1665471600"; d="scan'208";a="300439518" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Dec 2022 14:52:27 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10554"; a="646781163" X-IronPort-AV: E=Sophos;i="5.96,225,1665471600"; d="scan'208";a="646781163" Received: from rchatre-ws.ostc.intel.com ([10.54.69.144]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Dec 2022 14:52:27 -0800 From: Reinette Chatre To: fenghua.yu@intel.com, dave.jiang@intel.com, vkoul@kernel.org, dmaengine@vger.kernel.org Cc: linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH V2 3/3] dmaengine: idxd: Do not call DMX TX callbacks during workqueue disable Date: Wed, 7 Dec 2022 14:52:22 -0800 Message-Id: <37d06b772aa7f8863ca50f90930ea2fd80b38fc3.1670452419.git.reinette.chatre@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On driver unload any pending descriptors are flushed and pending DMA descriptors are explicitly completed: idxd_dmaengine_drv_remove() -> drv_disable_wq() -> idxd_wq_free_irq() -> idxd_flush_pending_descs() -> idxd_dma_complete_txd() With this done during driver unload any remaining descriptor is likely stuck and can be dropped. Even so, the descriptor may still have a callback set that could no longer be accessible. An example of such a problem is when the dmatest fails and the dmatest module is unloaded. The failure of dmatest leaves descriptors with dma_async_tx_descriptor::callback pointing to code that no longer exist. This causes a page fault as below at the time the IDXD driver is unloaded when it attempts to run the callback: BUG: unable to handle page fault for address: ffffffffc0665190 #PF: supervisor instruction fetch in kernel mode #PF: error_code(0x0010) - not-present page Fix this by clearing the callback pointers on the transmit descriptors only when workqueue is disabled. Fixes: 403a2e236538 ("dmaengine: idxd: change MSIX allocation based on per wq activation") Signed-off-by: Reinette Chatre Reviewed-by: Dave Jiang Reviewed-by: Fenghua Yu Cc: stable@vger.kernel.org --- Changes since V1: - Add Dave and Fenghua's Reviewed-by tags. - Cc stable team (Fenghua). - Move declaration local to block needing it (Fenghua). - Add appropriate Fixes tag (Fenghua). drivers/dma/idxd/device.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/dma/idxd/device.c b/drivers/dma/idxd/device.c index b4d7bb923a40..6d8ff664fdfb 100644 --- a/drivers/dma/idxd/device.c +++ b/drivers/dma/idxd/device.c @@ -1173,8 +1173,19 @@ static void idxd_flush_pending_descs(struct idxd_irq_entry *ie) spin_unlock(&ie->list_lock); list_for_each_entry_safe(desc, itr, &flist, list) { + struct dma_async_tx_descriptor *tx; + list_del(&desc->list); ctype = desc->completion->status ? IDXD_COMPLETE_NORMAL : IDXD_COMPLETE_ABORT; + /* + * wq is being disabled. Any remaining descriptors are + * likely to be stuck and can be dropped. callback could + * point to code that is no longer accessible, for example + * if dmatest module has been unloaded. + */ + tx = &desc->txd; + tx->callback = NULL; + tx->callback_result = NULL; idxd_dma_complete_txd(desc, ctype, true); } } -- 2.34.1