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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id u16-20020a056512095000b004994117b0fdsm3038581lft.281.2022.12.07.15.50.52 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 07 Dec 2022 15:50:52 -0800 (PST) Message-ID: Date: Thu, 8 Dec 2022 01:50:51 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.5.0 Subject: Re: [PATCH v3 05/11] drm/msm: Add support for SM8350 Content-Language: en-GB To: Robert Foss , robdclark@gmail.com, quic_abhinavk@quicinc.com, sean@poorly.run, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, konrad.dybcio@somainline.org, quic_kalyant@quicinc.com, angelogioacchino.delregno@somainline.org, loic.poulain@linaro.org, swboyd@chromium.org, quic_vpolimer@quicinc.com, vkoul@kernel.org, dianders@chromium.org, linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jonathan Marek , vinod.koul@linaro.org, quic_jesszhan@quicinc.com, andersson@kernel.org References: <20221205163754.221139-1-robert.foss@linaro.org> <20221205163754.221139-6-robert.foss@linaro.org> From: Dmitry Baryshkov In-Reply-To: <20221205163754.221139-6-robert.foss@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/12/2022 18:37, Robert Foss wrote: > Add compatibles string, "qcom,sm8350-mdss", for the multimedia display > subsystem unit used on Qualcomm SM8350 platform. > > Signed-off-by: Robert Foss > --- > drivers/gpu/drm/msm/msm_mdss.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c > index a2264fb517a1..39746b972cdd 100644 > --- a/drivers/gpu/drm/msm/msm_mdss.c > +++ b/drivers/gpu/drm/msm/msm_mdss.c > @@ -293,6 +293,9 @@ static int msm_mdss_enable(struct msm_mdss *msm_mdss) > /* UBWC_2_0 */ > msm_mdss_setup_ubwc_dec_20(msm_mdss, 0x1e); > break; > + case DPU_HW_VER_700: > + msm_mdss_setup_ubwc_dec_40(msm_mdss, UBWC_4_0, 6, 1, 1, 1); > + break; Judging from the vendor kernel, the highest_rank_bit is 3, with usual todo for 2 for LP_DDR4. > case DPU_HW_VER_720: > msm_mdss_setup_ubwc_dec_40(msm_mdss, UBWC_3_0, 6, 1, 1, 1); > break; > @@ -530,6 +533,7 @@ static const struct of_device_id mdss_dt_match[] = { > { .compatible = "qcom,sc8180x-mdss" }, > { .compatible = "qcom,sm8150-mdss" }, > { .compatible = "qcom,sm8250-mdss" }, > + { .compatible = "qcom,sm8350-mdss" }, > { .compatible = "qcom,sm8450-mdss" }, > {} > }; -- With best wishes Dmitry