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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id v2-20020a05683018c200b006706cd202b0sm617566ote.11.2022.12.07.18.09.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Dec 2022 18:09:54 -0800 (PST) Received: (nullmailer pid 3371218 invoked by uid 1000); Thu, 08 Dec 2022 02:09:54 -0000 Date: Wed, 7 Dec 2022 20:09:54 -0600 From: Rob Herring To: Liu Peibao Cc: Thomas Gleixner , Marc Zyngier , Krzysztof Kozlowski , Huacai Chen , WANG Xuerui , Jianmin Lv , Yinbo Zhu , wanghongliang , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/2] dt-bindings: interrupt-controller: add yaml for LoongArch CPU interrupt controller Message-ID: <20221208020954.GA3368836-robh@kernel.org> References: <20221114113824.1880-1-liupeibao@loongson.cn> <20221114113824.1880-3-liupeibao@loongson.cn> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221114113824.1880-3-liupeibao@loongson.cn> X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Nov 14, 2022 at 07:38:24PM +0800, Liu Peibao wrote: > Current LoongArch compatible CPUs support 14 CPU IRQs. We can describe how > the 14 IRQs are wired to the platform's internal interrupt controller by > devicetree. > > Signed-off-by: Liu Peibao > --- > .../loongarch,cpu-interrupt-controller.yaml | 34 +++++++++++++++++++ > 1 file changed, 34 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml > new file mode 100644 > index 000000000000..2a1cf885c99d > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/loongarch,cpu-interrupt-controller.yaml > @@ -0,0 +1,34 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interrupt-controller/loongarch,cpu-interrupt-controller.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: LoongArch CPU Interrupt Controller > + > +maintainers: > + - Liu Peibao > + > +properties: > + compatible: > + const: loongarch,cpu-interrupt-controller This doesn't match what the kernel is using. It has loongson rather than loongarch. Please send an incremental fix. (Don't forget the example) Rob