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[2620:137:e000::1:20]) by mx.google.com with ESMTP id j14-20020a05640211ce00b0046bdaa564bdsi7983090edw.419.2022.12.07.23.10.50; Wed, 07 Dec 2022 23:11:12 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=EXQxuSky; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229694AbiLHGlE (ORCPT + 74 others); Thu, 8 Dec 2022 01:41:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229437AbiLHGlA (ORCPT ); Thu, 8 Dec 2022 01:41:00 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1BA3D5B59C; Wed, 7 Dec 2022 22:41:00 -0800 (PST) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2B86K9Fg000618; Thu, 8 Dec 2022 06:40:52 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : mime-version : content-type : content-transfer-encoding; s=qcppdkim1; bh=aum5hJPfylvZo/gc3+w0sjQgd6UJ5UQnt6jxCI2I1V4=; b=EXQxuSkyY9bNJN0HEOcf7YMci9/Qasj6AVMwgpfRE5wGQDLyCYYfpQi/57x/zh3GWq6o gEl+2WuObPc6gG8Ul4g4Stw4ivJc8QTyMdqKGsZt8d0s8Tx8NlVC/V1MLcVDwRM/RRZg t9bOA5SeZYSm2arjyQ79g9g88ZOyAmPwDTmAehSvQdwsQC2mbntzt6FK0aRMq6GR73pZ j9g0x8Oc97yQzDURKuFZuaJF8/9yfb20p58DGo5jjX1ES1MR6XYLTfu1jmx+/Hahab85 UgVMD8lDTKQkAnUNthgCF6noqp1VHU3egkaoIjqaGUL1QT31G0VVgSM908awnlZCvolJ /w== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3maww6a5rt-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 08 Dec 2022 06:40:52 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2B86epYk023624 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 8 Dec 2022 06:40:51 GMT Received: from blr-ubuntu-87.ap.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 7 Dec 2022 22:40:47 -0800 From: Sibi Sankar To: , CC: , , , , , , , , , Sibi Sankar Subject: [PATCH V6 0/2] SCM: Add support for wait-queue aware firmware Date: Thu, 8 Dec 2022 12:10:29 +0530 Message-ID: <20221208064031.2875-1-quic_sibis@quicinc.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 9vq8RBdh44R1w0U_PO4-u9B6jB50qOJM X-Proofpoint-ORIG-GUID: 9vq8RBdh44R1w0U_PO4-u9B6jB50qOJM X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-08_04,2022-12-07_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 phishscore=0 impostorscore=0 lowpriorityscore=0 malwarescore=0 adultscore=0 priorityscore=1501 mlxlogscore=999 suspectscore=0 bulkscore=0 clxscore=1011 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2212080055 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch series enables the QCOM SCM driver to support firmware (FW) versions that expect the high-level OS (HLOS) to be tolerant of SCM call requests not being processed right away and, instead, being placed on a wait-queue in FW and processed accordingly. The problem this feature is fixing is as follows. In a scenario where there is a VM in addition to HLOS (and an underlying hypervisor): 1. HLOS makes an SMC call on core 5 2. The hypervisor scheduling interrupt interrupts this SMC call. 3. The hypervisor schedules the VM on core 5. 4. The VM makes an SMC call on core 5. 5. The SMC call is non-interruptibly stuck on FW spinlock on core 5. 6. HLOS cannot reschedule since core 5 is not responding to Reschedule IPIs. 7. Watchdog timer expires waiting for core 5. This problem is solved by FW returning a new return code SCM_WAITQ_SLEEP to HLOS right away when it is overwhelmed by the VM's SMC call. HLOS then places the call on a wait-queue and wakes it up when it receives an interrupt that signifies "all-clear". There are two new SMC calls also being defined in this design that, together with one new return code, form the handshake protocol between Linux and FW. This design is also backwards-compatible with existing firmware versions that do not support this feature. v6: - Fix subject of bindings [Krzysztof] - Update commit message to include the SoC supporting the feature [Krzysztof] - Make the interrupt property valid on SM8450 SoC [Krzysztof] - Fix misc. nits in the scm driver [Krzysztof] - Rebased on Krzysztof's narrow clocks and interconnect series. v5: - Pick up R-b - Handle the wake_one/wake_all flags [Guru] - Rename flag handler to qcom_scm_waitq_wakeup [Bjorn] - Resume scm call can return ebusy as well handle that scenario by retrying the original smc call and not the resume call v4: - platform_set_drvdata will be used by __scm_smc_do_quirk_handle_waitq to get access to scm struct from device so retain it - Use a single completion as it satisfies all of the current usecases [Bjorn] - Inline scm_get_wq_ctx [Bjorn] - Convert all pr_err to dev_err [Bjorn] - Handle idr_destroy in a thread safe manner [Bjorn] - Misc. Style fixes [Bjorn] - Qualify bindings [Krzysztoff] v3: - Drop allow-multi-call property since HLOS doesn't completely support it yet. - Fixup irq handling so as not to affect SoCs without the interrupt. - Fix warnings reported by kernel test-bot. v2: - Changes made to patches 4 and 5 are listed therein. - Rebased dt-bindings on top of the YAML conversion patch [1]. Depends on Krzysztof's narrow clocks and interconnect series: https://patchwork.kernel.org/project/linux-arm-msm/patch/20221122092345.44369-1-krzysztof.kozlowski@linaro.org/ https://patchwork.kernel.org/project/linux-arm-msm/patch/20221122092345.44369-2-krzysztof.kozlowski@linaro.org/ Guru Das Srinagesh (2): dt-bindings: firmware: qcom,scm: Add optional interrupt firmware: qcom: scm: Add wait-queue handling logic .../bindings/firmware/qcom,scm.yaml | 18 +++ drivers/firmware/qcom_scm-smc.c | 97 +++++++++++++-- drivers/firmware/qcom_scm.c | 114 +++++++++++++++++- drivers/firmware/qcom_scm.h | 9 ++ 4 files changed, 230 insertions(+), 8 deletions(-) -- 2.17.1