Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
Date:   Thu, 08 Dec 2022 09:11:16 +0100
From:   Conor Dooley <conor@kernel.org>
To:     Jiasheng Jiang <jiasheng@iscas.ac.cn>, mturquette@baylibre.com,
        sboyd@kernel.org, claudiu.beznea@microchip.com,
        conor.dooley@microchip.com
CC:     linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] clk: microchip: Add check for devm_kzalloc
User-Agent: K-9 Mail for Android
In-Reply-To: <20221208074025.29015-1-jiasheng@iscas.ac.cn>
References: <20221208074025.29015-1-jiasheng@iscas.ac.cn>
Message-ID: <F2FCAF36-B78B-4233-B0DE-A5AAE73EBCC5@kernel.org>
MIME-Version: 1.0
Content-Type: text/plain;
 charset=utf-8
Content-Transfer-Encoding: quoted-printable
Precedence: bulk


On 8 December 2022 08:40:25 GMT+01:00, Jiasheng Jiang <jiasheng@iscas=2Eac=
=2Ecn> wrote:
>As devm_kzalloc may return NULL pointer, the return value should
>be checked and return error if it fails since NULL is a invalid
>value of "name" =2E
>
>Fixes: d39fb172760e ("clk: microchip: add PolarFire SoC fabric clock supp=
ort")
>Signed-off-by: Jiasheng Jiang <jiasheng@iscas=2Eac=2Ecn>

Someone already sent this patch, but thanks=2E

>---
> drivers/clk/microchip/clk-mpfs-ccc=2Ec | 6 ++++++
> 1 file changed, 6 insertions(+)
>
>diff --git a/drivers/clk/microchip/clk-mpfs-ccc=2Ec b/drivers/clk/microch=
ip/clk-mpfs-ccc=2Ec
>index 7be028dced63=2E=2E32aae880a14f 100644
>--- a/drivers/clk/microchip/clk-mpfs-ccc=2Ec
>+++ b/drivers/clk/microchip/clk-mpfs-ccc=2Ec
>@@ -166,6 +166,9 @@ static int mpfs_ccc_register_outputs(struct device *d=
ev, struct mpfs_ccc_out_hw_
> 		struct mpfs_ccc_out_hw_clock *out_hw =3D &out_hws[i];
> 		char *name =3D devm_kzalloc(dev, 23, GFP_KERNEL);
>=20
>+		if (!name)
>+			return -ENOMEM;
>+
> 		snprintf(name, 23, "%s_out%u", parent->name, i);
> 		out_hw->divider=2Ehw=2Einit =3D CLK_HW_INIT_HW(name, &parent->hw, &clk=
_divider_ops, 0);
> 		out_hw->divider=2Ereg =3D data->pll_base[i / MPFS_CCC_OUTPUTS_PER_PLL]=
 +
>@@ -200,6 +203,9 @@ static int mpfs_ccc_register_plls(struct device *dev,=
 struct mpfs_ccc_pll_hw_clo
> 		struct mpfs_ccc_pll_hw_clock *pll_hw =3D &pll_hws[i];
> 		char *name =3D devm_kzalloc(dev, 18, GFP_KERNEL);
>=20
>+		if (!name)
>+			return -ENOMEM;
>+
> 		pll_hw->base =3D data->pll_base[i];
> 		snprintf(name, 18, "ccc%s_pll%u", strchrnul(dev->of_node->full_name, '=
@'), i);
> 		pll_hw->name =3D (const char *)name;