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Date:   Thu, 08 Dec 2022 10:10:49 +0100
From:   Conor Dooley <conor@kernel.org>
To:     Samuel Holland <samuel@sholland.org>, Chen-Yu Tsai <wens@csie.org>,
        Jernej Skrabec <jernej.skrabec@gmail.com>,
        linux-sunxi@lists.linux.dev, Palmer Dabbelt <palmer@dabbelt.com>,
        linux-riscv@lists.infradead.org
CC:     Jisheng Zhang <jszhang@kernel.org>, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Heiko Stuebner <heiko@sntech.de>,
        linux-arm-kernel@lists.infradead.org,
        Andre Przywara <andre.przywara@arm.com>,
        Palmer Dabbelt <palmer@rivosinc.com>,
        Guo Ren <guoren@kernel.org>
Subject: =?US-ASCII?Q?Re=3A_=5BPATCH_v3_11/12=5D_riscv=3A_Add_the?= =?US-ASCII?Q?_Allwinner_SoC_family_Kconfig_option?=
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Acked-by: Conor Dooley <conor=2Edooley@microchip=2Ecom>

On 8 December 2022 10:02:36 GMT+01:00, Samuel Holland <samuel@sholland=2Eo=
rg> wrote:
>Allwinner manufactures the sunxi family of application processors=2E This
>includes the "sun8i" series of ARMv7 SoCs, the "sun50i" series of ARMv8
>SoCs, and now the "sun20i" series of 64-bit RISC-V SoCs=2E
>
>The first SoC in the sun20i series is D1, containing a single T-HEAD
>C906 core=2E D1s is a low-pin-count variant of D1 with co-packaged DRAM=
=2E
>
>Most peripherals are shared across the entire chip family=2E In fact, the
>ARMv7 T113 SoC is pin-compatible and almost entirely register-compatible
>with the D1s=2E
>
>This means many existing device drivers can be reused=2E To facilitate
>this reuse, name the symbol ARCH_SUNXI, since that is what the existing
>drivers have as their dependency=2E
>
>Acked-by: Palmer Dabbelt <palmer@rivosinc=2Ecom>
>Reviewed-by: Guo Ren <guoren@kernel=2Eorg>
>Reviewed-by: Heiko Stuebner <heiko@sntech=2Ede>
>Tested-by: Heiko Stuebner <heiko@sntech=2Ede>
>Signed-off-by: Samuel Holland <samuel@sholland=2Eorg>
>---
>
>Changes in v3:
> - ARCH_SUNXI depends on MMU && !XIP_KERNEL
>
>Changes in v2:
> - Sort Kconfig as if we had done s/SOC_/ARCH_/ for future-proofing
>
> arch/riscv/Kconfig=2Esocs | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
>diff --git a/arch/riscv/Kconfig=2Esocs b/arch/riscv/Kconfig=2Esocs
>index 69774bb362d6=2E=2Ef655dea86d69 100644
>--- a/arch/riscv/Kconfig=2Esocs
>+++ b/arch/riscv/Kconfig=2Esocs
>@@ -26,6 +26,16 @@ config SOC_STARFIVE
> 	help
> 	  This enables support for StarFive SoC platform hardware=2E
>=20
>+config ARCH_SUNXI
>+	bool "Allwinner sun20i SoCs"
>+	depends on MMU && !XIP_KERNEL
>+	select ERRATA_THEAD
>+	select SIFIVE_PLIC
>+	select SUN4I_TIMER
>+	help
>+	  This enables support for Allwinner sun20i platform hardware,
>+	  including boards based on the D1 and D1s SoCs=2E
>+
> config SOC_VIRT
> 	bool "QEMU Virt Machine"
> 	select CLINT_TIMER if RISCV_M_MODE