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Date:   Thu, 08 Dec 2022 10:09:18 +0100
From:   Conor Dooley <conor@kernel.org>
To:     Samuel Holland <samuel@sholland.org>, Chen-Yu Tsai <wens@csie.org>,
        Jernej Skrabec <jernej.skrabec@gmail.com>,
        linux-sunxi@lists.linux.dev, Palmer Dabbelt <palmer@dabbelt.com>,
        linux-riscv@lists.infradead.org
CC:     Jisheng Zhang <jszhang@kernel.org>, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Heiko Stuebner <heiko@sntech.de>,
        linux-arm-kernel@lists.infradead.org,
        Andre Przywara <andre.przywara@arm.com>,
        Palmer Dabbelt <palmer@rivosinc.com>,
        Guo Ren <guoren@kernel.org>
Subject: =?US-ASCII?Q?Re=3A_=5BPATCH_v3_12/12=5D_riscv=3A_defconfig=3A_En?= =?US-ASCII?Q?able_the_Allwinner_D1_platform_and_drivers?=
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On 8 December 2022 10:02:37 GMT+01:00, Samuel Holland <samuel@sholland=2Eo=
rg> wrote:
>Now that several D1-based boards are supported, enable the platform in
>our defconfig=2E Build in the drivers which are necessary to boot, such a=
s
>the pinctrl, MMC, RTC (which provides critical clocks), SPI (for flash),
>and watchdog (which may be left enabled by the bootloader)=2E Other commo=
n
>onboard peripherals are enabled as modules=2E
>
>Acked-by: Palmer Dabbelt <palmer@rivosinc=2Ecom>

I'm more than happy if he's happy ;)

Acked-by: Conor Dooley <conor=2Edooley@microchip=2Ecom>

>Reviewed-by: Guo Ren <guoren@kernel=2Eorg>
>Signed-off-by: Samuel Holland <samuel@sholland=2Eorg>
>---
>
>(no changes since v1)
>
> arch/riscv/configs/defconfig | 22 +++++++++++++++++++++-
> 1 file changed, 21 insertions(+), 1 deletion(-)
>
>diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
>index 74ed7037314f=2E=2E368175560da9 100644
>--- a/arch/riscv/configs/defconfig
>+++ b/arch/riscv/configs/defconfig
>@@ -25,6 +25,7 @@ CONFIG_BLK_DEV_INITRD=3Dy
> CONFIG_EXPERT=3Dy
> # CONFIG_SYSFS_SYSCALL is not set
> CONFIG_PROFILING=3Dy
>+CONFIG_ARCH_SUNXI=3Dy
> CONFIG_SOC_MICROCHIP_POLARFIRE=3Dy
> CONFIG_SOC_SIFIVE=3Dy
> CONFIG_SOC_STARFIVE=3Dy
>@@ -119,8 +120,10 @@ CONFIG_VIRTIO_NET=3Dy
> CONFIG_MACB=3Dy
> CONFIG_E1000E=3Dy
> CONFIG_R8169=3Dy
>+CONFIG_STMMAC_ETH=3Dm
> CONFIG_MICROSEMI_PHY=3Dy
> CONFIG_INPUT_MOUSEDEV=3Dy
>+CONFIG_KEYBOARD_SUN4I_LRADC=3Dm
> CONFIG_SERIAL_8250=3Dy
> CONFIG_SERIAL_8250_CONSOLE=3Dy
> CONFIG_SERIAL_8250_DW=3Dy
>@@ -128,14 +131,20 @@ CONFIG_SERIAL_OF_PLATFORM=3Dy
> CONFIG_VIRTIO_CONSOLE=3Dy
> CONFIG_HW_RANDOM=3Dy
> CONFIG_HW_RANDOM_VIRTIO=3Dy
>+CONFIG_I2C_MV64XXX=3Dm
> CONFIG_SPI=3Dy
> CONFIG_SPI_SIFIVE=3Dy
>+CONFIG_SPI_SUN6I=3Dy
> # CONFIG_PTP_1588_CLOCK is not set
>-CONFIG_GPIOLIB=3Dy
> CONFIG_GPIO_SIFIVE=3Dy
>+CONFIG_WATCHDOG=3Dy
>+CONFIG_SUNXI_WATCHDOG=3Dy
>+CONFIG_REGULATOR=3Dy
>+CONFIG_REGULATOR_FIXED_VOLTAGE=3Dy
> CONFIG_DRM=3Dm
> CONFIG_DRM_RADEON=3Dm
> CONFIG_DRM_NOUVEAU=3Dm
>+CONFIG_DRM_SUN4I=3Dm
> CONFIG_DRM_VIRTIO_GPU=3Dm
> CONFIG_FB=3Dy
> CONFIG_FRAMEBUFFER_CONSOLE=3Dy
>@@ -148,19 +157,30 @@ CONFIG_USB_OHCI_HCD=3Dy
> CONFIG_USB_OHCI_HCD_PLATFORM=3Dy
> CONFIG_USB_STORAGE=3Dy
> CONFIG_USB_UAS=3Dy
>+CONFIG_USB_MUSB_HDRC=3Dm
>+CONFIG_USB_MUSB_SUNXI=3Dm
>+CONFIG_NOP_USB_XCEIV=3Dm
> CONFIG_MMC=3Dy
> CONFIG_MMC_SDHCI=3Dy
> CONFIG_MMC_SDHCI_PLTFM=3Dy
> CONFIG_MMC_SDHCI_CADENCE=3Dy
> CONFIG_MMC_SPI=3Dy
>+CONFIG_MMC_SUNXI=3Dy
> CONFIG_RTC_CLASS=3Dy
>+CONFIG_RTC_DRV_SUN6I=3Dy
>+CONFIG_DMADEVICES=3Dy
>+CONFIG_DMA_SUN6I=3Dm
> CONFIG_VIRTIO_PCI=3Dy
> CONFIG_VIRTIO_BALLOON=3Dy
> CONFIG_VIRTIO_INPUT=3Dy
> CONFIG_VIRTIO_MMIO=3Dy
>+CONFIG_SUN8I_DE2_CCU=3Dm
>+CONFIG_SUN50I_IOMMU=3Dy
> CONFIG_RPMSG_CHAR=3Dy
> CONFIG_RPMSG_CTRL=3Dy
> CONFIG_RPMSG_VIRTIO=3Dy
>+CONFIG_PHY_SUN4I_USB=3Dm
>+CONFIG_NVMEM_SUNXI_SID=3Dy
> CONFIG_EXT4_FS=3Dy
> CONFIG_EXT4_FS_POSIX_ACL=3Dy
> CONFIG_EXT4_FS_SECURITY=3Dy