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([2404:f801:9000:1a:efea::75b]) by smtp.gmail.com with ESMTPSA id c129-20020a624e87000000b0057627521e82sm13398950pfb.195.2022.12.08.06.21.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 08 Dec 2022 06:21:44 -0800 (PST) Message-ID: Date: Thu, 8 Dec 2022 22:21:34 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.5.1 Subject: Re: [RFC PATCH V2 16/18] x86/sev: Initialize #HV doorbell and handle interrupt requests Content-Language: en-US To: "Gupta, Pankaj" , luto@kernel.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, seanjc@google.com, pbonzini@redhat.com, jgross@suse.com, tiala@microsoft.com, kirill@shutemov.name, jiangshan.ljs@antgroup.com, peterz@infradead.org, ashish.kalra@amd.com, srutherford@google.com, akpm@linux-foundation.org, anshuman.khandual@arm.com, pawan.kumar.gupta@linux.intel.com, adrian.hunter@intel.com, daniel.sneddon@linux.intel.com, alexander.shishkin@linux.intel.com, sandipan.das@amd.com, ray.huang@amd.com, brijesh.singh@amd.com, michael.roth@amd.com, thomas.lendacky@amd.com, venu.busireddy@oracle.com, sterritt@google.com, tony.luck@intel.com, samitolvanen@google.com, fenghua.yu@intel.com Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-arch@vger.kernel.org References: <20221119034633.1728632-1-ltykernel@gmail.com> <20221119034633.1728632-17-ltykernel@gmail.com> From: Tianyu Lan In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM,NICE_REPLY_A, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12/7/2022 10:13 PM, Gupta, Pankaj wrote: >> +#endif >> +} >> + >>   static __always_inline void native_irq_disable(void) >>   { >>       asm volatile("cli": : :"memory"); >> @@ -43,6 +59,9 @@ static __always_inline void native_irq_disable(void) >>   static __always_inline void native_irq_enable(void) >>   { >>       asm volatile("sti": : :"memory"); >> +#ifdef CONFIG_AMD_MEM_ENCRYPT >> +    check_hv_pending(NULL); > > Just trying to understand when regs will be NULL? check_hv_pending() will be divided into two functions. The one handles #hv event in the #HV exception code path. The other one handles pending irq event in the irq re-enable code path。 In this version, the "regs = NULL" for check_hv_pending() is used in the irq re-enable code path.