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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BL1PR11MB6025.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: ad22cd8d-b7f4-44c9-9497-08dada05f108 X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Dec 2022 16:53:47.9597 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: zE0R0JRwDmmq0J5Ow0r7O7TZ6oBlZyMlR7LrLUIVt+6wQkFK0hk8wXNjP4fXKi8ekolGC8ljxWS20isAZEL+hA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR11MB6720 X-OriginatorOrg: intel.com X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org >From: Tian, Kevin =20 >Not a NVMe guy but obviously Intel should join. I have forwarded this >to internal folks to check the actual status. Intel team has been actively participating in the TPAR definition over last= month. The key leadership in NVMe WG, Peter and Nick (from Intel), are on top of t= his TPAR, and help influence the scope of the TPAR to better support IPU/DPUs. IPU/D= PU is a new type of device that desperately needs a standard based live migration s= olution. Soon, you may also see more Intel people to be part of the SW WG for the NV= Me live=20 migration standardization effort. >And I also asked them to prepare a document explaining how this >opaque cmd actually works to address your concerns. There is nothing secret. It's the VF states including VF CSR registers, IO= QP states, and=20 the AdminQ state. The AdminQ state may also include the pending AER comman= d. As part of the NVMe live migration standardization effort, it's desirable t= o standardize the structure as much as we can, and then have an extension for any device = specific state that may be required to work around specific design HW limitations.