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From:   <Tharunkumar.Pasumarthi@microchip.com>
To:     <andriy.shevchenko@linux.intel.com>,
        <Kumaravel.Thiagarajan@microchip.com>
CC:     <linux-kernel@vger.kernel.org>, <linux-serial@vger.kernel.org>,
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Subject: RE: [PATCH v7 tty-next 2/4] serial: 8250_pci1xxxx: Add driver for
 quad-uart support
Thread-Topic: [PATCH v7 tty-next 2/4] serial: 8250_pci1xxxx: Add driver for
 quad-uart support
Thread-Index: AQHZCi23nlvhMmG2bkuZfoGyMpcz2K5i2P8AgAQklKA=
Date:   Sat, 10 Dec 2022 11:19:18 +0000
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References: <20221207235305.695541-1-kumaravel.thiagarajan@microchip.com>
 <20221207235305.695541-3-kumaravel.thiagarajan@microchip.com>
 <Y5DxEszrq0rXVqvl@smile.fi.intel.com>
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> From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> Sent: Thursday, December 8, 2022 1:31 AM
> To: Kumaravel Thiagarajan - I21417
> <Kumaravel.Thiagarajan@microchip.com>
> Subject: Re: [PATCH v7 tty-next 2/4] serial: 8250_pci1xxxx: Add driver fo=
r
> quad-uart support
>=20
> > +     priv->membase =3D pcim_iomap(pdev, 0, 0);
>=20
> Is any of those card can have an IO bar (instead of MEM)?

No Andy

> > +     if (num_vectors =3D=3D 4)
> > +             writeb(UART_PCI_CTRL_SET_MULTIPLE_MSI,
> > +                    priv->membase + UART_PCI_CTRL_REG);
>=20
> If you set this unconditionally when num_vectors < 4, would it still work=
?

UART_PCI_CTRL_SET_MULTIPLE_MSI must be set only when all the requested inte=
rrupt vectors   =20
are allocated by the pci_alloc_irq_vectors API. Number of interrupt vectors=
 requested was always
4 previously and that logic will be modified to request only which is requi=
red in V8 patch.=20


Thanks,
Tharun Kumar P