Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
MIME-Version: 1.0
References: <20221210171141.1120123-1-guoren@kernel.org> <87o7s9ay4v.fsf@all.your.base.are.belong.to.us>
In-Reply-To: <87o7s9ay4v.fsf@all.your.base.are.belong.to.us>
From:   Guo Ren <guoren@kernel.org>
Date:   Mon, 12 Dec 2022 15:47:08 +0800
Message-ID: <CAJF2gTTtw2A3Xkp7HZR4e+g9kZ9DGJx+gG2PtoTz1uAjnJ0mQw@mail.gmail.com>
Subject: Re: [PATCH -next V11 0/7] riscv: Add GENERIC_ENTRY support
To:     =?UTF-8?B?QmrDtnJuIFTDtnBlbA==?= <bjorn@kernel.org>
Cc:     arnd@arndb.de, palmer@rivosinc.com, tglx@linutronix.de,
        peterz@infradead.org, luto@kernel.org, conor.dooley@microchip.com,
        heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com,
        falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com,
        atishp@atishpatra.org, paul.walmsley@sifive.com,
        mark.rutland@arm.com, greentime.hu@sifive.com,
        andy.chiu@sifive.com, ben@decadent.org.uk,
        linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-riscv@lists.infradead.org, Guo Ren <guoren@linux.alibaba.com>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
Precedence: bulk

On Mon, Dec 12, 2022 at 3:18 PM Bj=C3=B6rn T=C3=B6pel <bjorn@kernel.org> wr=
ote:
>
> guoren@kernel.org writes:
>
> > From: Guo Ren <guoren@linux.alibaba.com>
> >
> > The patches convert riscv to use the generic entry infrastructure from
> > kernel/entry/*. Some optimization for entry.S with new .macro and merge
> > ret_from_kernel_thread into ret_from_fork.
> >
> > The 1,2 are the preparation of generic entry. 3~7 are the main part
> > of generic entry.
> >
> > All tested with rv64, rv32, rv64 + 32rootfs, all are passed.
> >
> > You can directly try it with:
> > [1] https://github.com/guoren83/linux/tree/generic_entry_v11
Sorry, I forgot to push. Now it's ready.

>
> FWIW, the v11 branch is not available here.
>
> This series is a really nice cleanup for the RISC-V entry code. I've run
> it on some kernel selftests, and haven't seen any issues.
>
> I'm looking forward to having this series pulled in!
>
> Reviewed-by: Bj=C3=B6rn T=C3=B6pel <bjorn@rivosinc.com>
Thx.


--=20
Best Regards
 Guo Ren