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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SJ1PR11MB6204.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: f4daca2b-e12f-49cf-2b26-08dadc214389 X-MS-Exchange-CrossTenant-originalarrivaltime: 12 Dec 2022 09:14:25.1284 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: o8dSDbfuoqF1QkE4sM3Ag4nscPcMvHXi/s4mSUQceTxE/PUWbtuU8KrcEGL74RAI7OKsY2WK1395Jj1XSvtmhY9/qgCC17eCcD66OPZb/Rs= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR11MB6084 X-OriginatorOrg: intel.com X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Intel-gfx On Behalf Of > Andrzej Hajda > Sent: Friday, December 9, 2022 9:19 PM > To: linux-kernel@vger.kernel.org; intel-gfx@lists.freedesktop.org; dri- > devel@lists.freedesktop.org > Cc: Hajda, Andrzej ; Arnd Bergmann > ; Vivi, Rodrigo ; Andrew Morton > ; Andy Shevchenko > > Subject: [Intel-gfx] [PATCH 3/5] drm/i915/gt: kill fetch_and_zero usage >=20 > Better use recently introduced kernel core helper. >=20 > Signed-off-by: Andrzej Hajda > --- > drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +- > drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c | 4 ++-- > drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 4 ++-- > drivers/gpu/drm/i915/gt/intel_ggtt.c | 4 ++-- > drivers/gpu/drm/i915/gt/intel_gsc.c | 2 +- > drivers/gpu/drm/i915/gt/intel_gt.c | 4 ++-- > drivers/gpu/drm/i915/gt/intel_gt_pm.c | 2 +- > drivers/gpu/drm/i915/gt/intel_lrc.c | 6 +++--- > drivers/gpu/drm/i915/gt/intel_migrate.c | 2 +- > drivers/gpu/drm/i915/gt/intel_rc6.c | 2 +- > drivers/gpu/drm/i915/gt/intel_rps.c | 2 +- > drivers/gpu/drm/i915/gt/selftest_context.c | 2 +- > drivers/gpu/drm/i915/gt/selftest_ring_submission.c | 2 +- > drivers/gpu/drm/i915/gt/selftest_timeline.c | 2 +- > drivers/gpu/drm/i915/gt/uc/intel_uc.c | 2 +- > drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 2 +- > 16 files changed, 22 insertions(+), 22 deletions(-) >=20 > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c > b/drivers/gpu/drm/i915/gt/intel_engine_cs.c > index c33e0d72d6702b..de318d96d52abd 100644 > --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c > +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c > @@ -1024,7 +1024,7 @@ static void cleanup_status_page(struct > intel_engine_cs *engine) > /* Prevent writes into HWSP after returning the page to the system */ > intel_engine_set_hwsp_writemask(engine, ~0u); >=20 > - vma =3D fetch_and_zero(&engine->status_page.vma); > + vma =3D exchange(&engine->status_page.vma, NULL); > if (!vma) > return; >=20 > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c > b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c > index 9a527e1f5be655..6029fafaaa674f 100644 > --- a/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c > +++ b/drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c > @@ -229,7 +229,7 @@ static void heartbeat(struct work_struct *wrk) > mutex_unlock(&ce->timeline->mutex); > out: > if (!engine->i915->params.enable_hangcheck || > !next_heartbeat(engine)) > - i915_request_put(fetch_and_zero(&engine- > >heartbeat.systole)); > + i915_request_put(exchange(&engine->heartbeat.systole, 0)); > intel_engine_pm_put(engine); > } >=20 > @@ -244,7 +244,7 @@ void intel_engine_unpark_heartbeat(struct > intel_engine_cs *engine) void intel_engine_park_heartbeat(struct > intel_engine_cs *engine) { > if (cancel_delayed_work(&engine->heartbeat.work)) > - i915_request_put(fetch_and_zero(&engine- > >heartbeat.systole)); > + i915_request_put(exchange(&engine->heartbeat.systole, 0)); > } >=20 > void intel_gt_unpark_heartbeats(struct intel_gt *gt) diff --git > a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c > b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c > index 49a8f10d76c77b..29e78078d55a8b 100644 > --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c > +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c > @@ -3197,7 +3197,7 @@ static void execlists_reset_cancel(struct > intel_engine_cs *engine) > RB_CLEAR_NODE(rb); >=20 > spin_lock(&ve->base.sched_engine->lock); > - rq =3D fetch_and_zero(&ve->request); > + rq =3D exchange(&ve->request, NULL); > if (rq) { > if (i915_request_mark_eio(rq)) { > rq->engine =3D engine; > @@ -3602,7 +3602,7 @@ static void rcu_virtual_context_destroy(struct > work_struct *wrk) >=20 > spin_lock_irq(&ve->base.sched_engine->lock); >=20 > - old =3D fetch_and_zero(&ve->request); > + old =3D exchange(&ve->request, NULL); > if (old) { > GEM_BUG_ON(!__i915_request_is_complete(old)); > __i915_request_submit(old); > diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c > b/drivers/gpu/drm/i915/gt/intel_ggtt.c > index 0c7fe360f87331..2eb0173c6e968c 100644 > --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c > +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c > @@ -684,7 +684,7 @@ static void fini_aliasing_ppgtt(struct i915_ggtt *ggt= t) { > struct i915_ppgtt *ppgtt; >=20 > - ppgtt =3D fetch_and_zero(&ggtt->alias); > + ppgtt =3D exchange(&ggtt->alias, NULL); > if (!ppgtt) > return; >=20 > @@ -1238,7 +1238,7 @@ bool i915_ggtt_resume_vm(struct > i915_address_space *vm) > was_bound); >=20 > if (obj) { /* only used during resume =3D> exclusive access */ > - write_domain_objs |=3D fetch_and_zero(&obj- > >write_domain); > + write_domain_objs |=3D exchange(&obj- > >write_domain, 0); > obj->read_domains |=3D I915_GEM_DOMAIN_GTT; > } > } > diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c > b/drivers/gpu/drm/i915/gt/intel_gsc.c > index bcc3605158dbde..7226b42bb70b2a 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gsc.c > +++ b/drivers/gpu/drm/i915/gt/intel_gsc.c > @@ -70,7 +70,7 @@ gsc_ext_om_alloc(struct intel_gsc *gsc, struct > intel_gsc_intf *intf, size_t size >=20 > static void gsc_ext_om_destroy(struct intel_gsc_intf *intf) { > - struct drm_i915_gem_object *obj =3D fetch_and_zero(&intf->gem_obj); > + struct drm_i915_gem_object *obj =3D exchange(&intf->gem_obj, NULL); >=20 > if (!obj) > return; > diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c > b/drivers/gpu/drm/i915/gt/intel_gt.c > index 4e7af9bc73ad05..a277bd47db813e 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gt.c > +++ b/drivers/gpu/drm/i915/gt/intel_gt.c > @@ -757,7 +757,7 @@ int intel_gt_init(struct intel_gt *gt) > intel_uc_fini(>->uc); > err_engines: > intel_engines_release(gt); > - i915_vm_put(fetch_and_zero(>->vm)); > + i915_vm_put(exchange(>->vm, 0)); > err_pm: > intel_gt_pm_fini(gt); > intel_gt_fini_scratch(gt); > @@ -806,7 +806,7 @@ void intel_gt_driver_release(struct intel_gt *gt) { > struct i915_address_space *vm; >=20 > - vm =3D fetch_and_zero(>->vm); > + vm =3D exchange(>->vm, NULL); > if (vm) /* FIXME being called twice on error paths :( */ > i915_vm_put(vm); >=20 > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c > b/drivers/gpu/drm/i915/gt/intel_gt_pm.c > index 16db85fab0b19b..f066936994a9e2 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c > +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c > @@ -123,7 +123,7 @@ static int __gt_unpark(struct intel_wakeref *wf) > static int __gt_park(struct intel_wakeref *wf) { > struct intel_gt *gt =3D container_of(wf, typeof(*gt), wakeref); > - intel_wakeref_t wakeref =3D fetch_and_zero(>->awake); > + intel_wakeref_t wakeref =3D exchange(>->awake, 0); > struct drm_i915_private *i915 =3D gt->i915; >=20 > GT_TRACE(gt, "\n"); > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c > b/drivers/gpu/drm/i915/gt/intel_lrc.c > index 7771a19008c604..9a2bfb6d14196c 100644 > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > @@ -1144,7 +1144,7 @@ __lrc_alloc_state(struct intel_context *ce, struct > intel_engine_cs *engine) static struct intel_timeline * pinned_timeline= (struct > intel_context *ce, struct intel_engine_cs *engine) { > - struct intel_timeline *tl =3D fetch_and_zero(&ce->timeline); > + struct intel_timeline *tl =3D exchange(&ce->timeline, NULL); >=20 > return intel_timeline_create_from_engine(engine, > page_unmask_bits(tl)); } @@ -1261,8 +1261,8 @@ void lrc_fini(struct > intel_context *ce) > if (!ce->state) > return; >=20 > - intel_ring_put(fetch_and_zero(&ce->ring)); > - i915_vma_put(fetch_and_zero(&ce->state)); > + intel_ring_put(exchange(&ce->ring, 0)); > + i915_vma_put(exchange(&ce->state, 0)); > } >=20 > void lrc_destroy(struct kref *kref) > diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c > b/drivers/gpu/drm/i915/gt/intel_migrate.c > index b405a04135ca21..2c076a51b66b30 100644 > --- a/drivers/gpu/drm/i915/gt/intel_migrate.c > +++ b/drivers/gpu/drm/i915/gt/intel_migrate.c > @@ -1116,7 +1116,7 @@ void intel_migrate_fini(struct intel_migrate *m) { > struct intel_context *ce; >=20 > - ce =3D fetch_and_zero(&m->context); > + ce =3D exchange(&m->context, NULL); > if (!ce) > return; >=20 > diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c > b/drivers/gpu/drm/i915/gt/intel_rc6.c > index 2ee4051e4d9613..2451ebddb0f982 100644 > --- a/drivers/gpu/drm/i915/gt/intel_rc6.c > +++ b/drivers/gpu/drm/i915/gt/intel_rc6.c > @@ -702,7 +702,7 @@ void intel_rc6_fini(struct intel_rc6 *rc6) >=20 > intel_rc6_disable(rc6); >=20 > - pctx =3D fetch_and_zero(&rc6->pctx); > + pctx =3D exchange(&rc6->pctx, NULL); > if (pctx) > i915_gem_object_put(pctx); >=20 > diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c > b/drivers/gpu/drm/i915/gt/intel_rps.c > index 9ad3bc7201cbaa..a102d8768e1d7b 100644 > --- a/drivers/gpu/drm/i915/gt/intel_rps.c > +++ b/drivers/gpu/drm/i915/gt/intel_rps.c > @@ -1831,7 +1831,7 @@ static void rps_work(struct work_struct *work) > u32 pm_iir =3D 0; >=20 > spin_lock_irq(gt->irq_lock); > - pm_iir =3D fetch_and_zero(&rps->pm_iir) & rps->pm_events; > + pm_iir =3D exchange(&rps->pm_iir, 0) & rps->pm_events; > client_boost =3D atomic_read(&rps->num_waiters); > spin_unlock_irq(gt->irq_lock); >=20 > diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c > b/drivers/gpu/drm/i915/gt/selftest_context.c > index 76fbae358072df..ca0a38de696eec 100644 > --- a/drivers/gpu/drm/i915/gt/selftest_context.c > +++ b/drivers/gpu/drm/i915/gt/selftest_context.c > @@ -171,7 +171,7 @@ static int live_context_size(void *arg) > * active state is sufficient, we are only checking that we > * don't use more than we planned. > */ > - saved =3D fetch_and_zero(&engine->default_state); > + saved =3D exchange(&engine->default_state, NULL); >=20 > /* Overlaps with the execlists redzone */ > engine->context_size +=3D I915_GTT_PAGE_SIZE; diff --git > a/drivers/gpu/drm/i915/gt/selftest_ring_submission.c > b/drivers/gpu/drm/i915/gt/selftest_ring_submission.c > index 87ceb0f374b673..9e901f1d5d76a9 100644 > --- a/drivers/gpu/drm/i915/gt/selftest_ring_submission.c > +++ b/drivers/gpu/drm/i915/gt/selftest_ring_submission.c > @@ -269,7 +269,7 @@ static int live_ctx_switch_wa(void *arg) > if (IS_GRAPHICS_VER(gt->i915, 4, 5)) > continue; /* MI_STORE_DWORD is privileged! */ >=20 > - saved_wa =3D fetch_and_zero(&engine->wa_ctx.vma); > + saved_wa =3D exchange(&engine->wa_ctx.vma, NULL); >=20 > intel_engine_pm_get(engine); > err =3D __live_ctx_switch_wa(engine); > diff --git a/drivers/gpu/drm/i915/gt/selftest_timeline.c > b/drivers/gpu/drm/i915/gt/selftest_timeline.c > index 522d0190509ccc..d74b13b1b38a6e 100644 > --- a/drivers/gpu/drm/i915/gt/selftest_timeline.c > +++ b/drivers/gpu/drm/i915/gt/selftest_timeline.c > @@ -892,7 +892,7 @@ static int create_watcher(struct hwsp_watcher *w, > static int check_watcher(struct hwsp_watcher *w, const char *name, > bool (*op)(u32 hwsp, u32 seqno)) > { > - struct i915_request *rq =3D fetch_and_zero(&w->rq); > + struct i915_request *rq =3D exchange(&w->rq, NULL); > u32 offset, end; > int err; >=20 > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c > b/drivers/gpu/drm/i915/gt/uc/intel_uc.c > index 4f4b519e12c1b7..0085b1727dd47a 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c > @@ -166,7 +166,7 @@ static void __uc_capture_load_err_log(struct intel_uc > *uc) >=20 > static void __uc_free_load_err_log(struct intel_uc *uc) { > - struct drm_i915_gem_object *log =3D fetch_and_zero(&uc- > >load_err_log); > + struct drm_i915_gem_object *log =3D exchange(&uc->load_err_log, > NULL); >=20 > if (log) > i915_gem_object_put(log); > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > index 6c83a8b66c9e32..44ff6da26bd698 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c > @@ -1055,7 +1055,7 @@ void intel_uc_fw_cleanup_fetch(struct intel_uc_fw > *uc_fw) > if (!intel_uc_fw_is_available(uc_fw)) > return; >=20 > - i915_gem_object_put(fetch_and_zero(&uc_fw->obj)); > + i915_gem_object_put(exchange(&uc_fw->obj, 0)); Should this be set to NULL instead? Thanks, Tejas >=20 > intel_uc_fw_change_status(uc_fw, > INTEL_UC_FIRMWARE_SELECTED); } > -- > 2.34.1