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[96.230.116.121]) by smtp.gmail.com with ESMTPSA id 195-20020a370ccc000000b006fb11eee465sm6747657qkm.64.2022.12.12.16.56.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 16:56:55 -0800 (PST) From: Eric Chanudet To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Halaney , Brian Masney , Eric Chanudet Subject: [PATCH 1/2] arm64: dts: qcom: pm8450a: add rtc node Date: Mon, 12 Dec 2022 19:55:38 -0500 Message-Id: <20221213005539.1133443-1-echanude@redhat.com> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 Content-type: text/plain Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the rtc block on pm8450a first pmic to enable the rtc for sa8540p-ride. Signed-off-by: Eric Chanudet --- arch/arm64/boot/dts/qcom/pm8450a.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/pm8450a.dtsi b/arch/arm64/boot/dts/qcom/pm8450a.dtsi index 34fc72896761..af761dbfbc66 100644 --- a/arch/arm64/boot/dts/qcom/pm8450a.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8450a.dtsi @@ -13,6 +13,14 @@ pm8450a: pmic@0 { #address-cells = <1>; #size-cells = <0>; + rtc@6000 { + compatible = "qcom,pm8941-rtc"; + reg = <0x6000>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; + wakeup-source; + }; + pm8450a_gpios: gpio@c000 { compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; reg = <0xc000>; -- 2.38.1