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Wed, 14 Dec 2022 07:31:37 -0600 Received: from ediex02.ad.cirrus.com (198.61.84.81) by ediex02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.20; Wed, 14 Dec 2022 07:31:36 -0600 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by anon-ediex02.ad.cirrus.com (198.61.84.81) with Microsoft SMTP Server id 15.2.1118.20 via Frontend Transport; Wed, 14 Dec 2022 07:31:36 -0600 Received: from ediswmail.ad.cirrus.com (ediswmail.ad.cirrus.com [198.61.86.93]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 3153E458; Wed, 14 Dec 2022 13:31:36 +0000 (UTC) Date: Wed, 14 Dec 2022 13:31:36 +0000 From: Charles Keepax To: Lukasz Majewski CC: Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Stephen Kitt , , , Subject: Re: [PATCH 2/4] ASoC: wm8940: Rewrite code to set proper clocks Message-ID: <20221214133136.GQ105268@ediswmail.ad.cirrus.com> References: <20221214123743.3713843-1-lukma@denx.de> <20221214123743.3713843-3-lukma@denx.de> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20221214123743.3713843-3-lukma@denx.de> User-Agent: Mutt/1.5.21 (2010-09-15) X-Proofpoint-ORIG-GUID: ciLYuOB-zJb_vroAegOl3Jla7YXlKn3d X-Proofpoint-GUID: ciLYuOB-zJb_vroAegOl3Jla7YXlKn3d X-Proofpoint-Spam-Reason: safe X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Dec 14, 2022 at 01:37:41PM +0100, Lukasz Majewski wrote: > Without this change, the wm8940 driver is not working when > set_sysclk callback (wm8940_set_dai_sysclk) is called with > frequency not listed in the switch clause. > > This change adjusts this driver to allow non-standard frequency > set (just after the boot) being adjusted afterwards by the sound > system core code. > > Moreover, support for internal wm8940's PLL is provided, so it > can generate clocks when HOST system is not able to do it. > > Code in this commit is based on previous change done for wm8974 > (SHA1: 51b2bb3f2568e6d9d81a001d38b8d70c2ba4af99). > > Signed-off-by: Lukasz Majewski > --- > struct snd_soc_component *component = dai->component; > + struct wm8940_priv *priv = snd_soc_component_get_drvdata(component); > u16 iface = snd_soc_component_read(component, WM8940_IFACE) & 0xFD9F; > u16 addcntrl = snd_soc_component_read(component, WM8940_ADDCNTRL) & 0xFFF1; > u16 companding = snd_soc_component_read(component, > WM8940_COMPANDINGCTL) & 0xFFDF; > int ret; > > + priv->fs = params_rate(params); > + ret = wm8940_update_clocks(dai); > + if (ret) > + return ret; > + I think this all looks mostly good, my only slight concern would be the interaction with the manual functions for settings the PLL etc. I guess under this code, whatever manual settings were configured will be overwritten with the new auto settings, I think this should be fine as the PLL wants to be run in a pretty narrow band anyway, so the settings are likely identical. Do you have any thoughts? Thanks, Charles