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Thu, 15 Dec 2022 11:32:47 -0600 Received: from xsjlizhih40.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Thu, 15 Dec 2022 11:32:47 -0600 From: Lizhi Hou To: , , CC: Lizhi Hou , , , , , Subject: [PATCH V11 XDMA 2/2] dmaengine: xilinx: xdma: Add user logic interrupt support Date: Thu, 15 Dec 2022 09:32:33 -0800 Message-ID: <1671125553-57707-3-git-send-email-lizhi.hou@amd.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1671125553-57707-1-git-send-email-lizhi.hou@amd.com> References: <1671125553-57707-1-git-send-email-lizhi.hou@amd.com> MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT087:EE_|PH7PR12MB6000:EE_ X-MS-Office365-Filtering-Correlation-Id: 6a0c9d9a-7f82-433c-3b01-08dadec262ca X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: MR1uq1bEmp7c34z5is36tuZHzUSJMhhyTZPg7pWYeA4qDNMlM5cI3zh0aF95rdQ+RuTBnGsIUeH3ytktzZYd9CYcwp9guAbLfgc5UMOdsMqjTRuEfswvuzA6HIEVY17OR1JKzJNfWBXTT1sC6GzHEYQsAxwAR6UyYKfymevrCyfQfPToK1alXLp35AOYZwTgx8mXULVI5Wq00SE/WMB5toteg9hTDGD8txTPqKDJMJbFlK9XO10b/ERFOx2L07ng4CpTu/oojJ2s8xms/pvTj+kvsMB2kgL2gtUQuow1+6h0AaNf0J2RXTWa2wquTpyjbb+EnXxbt+zF3KeTSxyKi8agNDVCSEJLkrm3KR4TpPmWkcs5A/8BJejMkXY6WVF7sNCLO+Zoh8CCybOq8XuXb1OTzTA15DAFAgUEJbx8SY7+N5m3lKYkXNRSea+5TS3rlVJ9WdMoMDEnJJSejnaeDiLLZwLBa7yLJmbSD5c9cY/SJ9/LuQ5JHsmFimJCM9klpqUk6HP1wOMTrKllNf/w9xTcbFC9/aLGXdWNNAMmUkFeRfIvml6gLK8lTKCnzpjImY5gkXG4R1PjKnDZhEvnWV+yiVgwYlrCj6n9n2j1MDkWRsSYHKyNom48pVePzmcAshsIx2XPr5UMSxxHfXvmODRgRKjdif/a3C1qy1nSw3rnc5OMsgkMgbKaPZFoyRxTlQftELs5aC1AO9myoPSCfVvKZJdhSsZLElanMPZLYRk= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:CA;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(376002)(39860400002)(396003)(346002)(136003)(451199015)(46966006)(36840700001)(40470700004)(36756003)(356005)(2906002)(82740400003)(81166007)(40480700001)(8936002)(82310400005)(5660300002)(41300700001)(40460700003)(47076005)(426003)(83380400001)(36860700001)(86362001)(478600001)(54906003)(110136005)(44832011)(4326008)(6666004)(70586007)(316002)(8676002)(2616005)(70206006)(26005)(186003)(336012)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Dec 2022 17:32:48.7382 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6a0c9d9a-7f82-433c-3b01-08dadec262ca X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT087.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6000 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Xilinx DMA/Bridge Subsystem for PCIe (XDMA) provides up to 16 user interrupt wires to user logic that generate interrupts to the host. This patch adds APIs to enable/disable user logic interrupt for a given interrupt wire index. Signed-off-by: Lizhi Hou Signed-off-by: Sonal Santan Signed-off-by: Max Zhen Signed-off-by: Brian Xu Tested-by: Martin Tuma --- MAINTAINERS | 1 + drivers/dma/xilinx/xdma.c | 85 ++++++++++++++++++++++++++++++++++++ include/linux/dma/amd_xdma.h | 16 +++++++ 3 files changed, 102 insertions(+) create mode 100644 include/linux/dma/amd_xdma.h diff --git a/MAINTAINERS b/MAINTAINERS index d598c4e23901..eaf6590dda19 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22583,6 +22583,7 @@ L: dmaengine@vger.kernel.org S: Supported F: drivers/dma/xilinx/xdma-regs.h F: drivers/dma/xilinx/xdma.c +F: include/linux/dma/amd_xdma.h F: include/linux/platform_data/amd_xdma.h XILINX ZYNQMP DPDMA DRIVER diff --git a/drivers/dma/xilinx/xdma.c b/drivers/dma/xilinx/xdma.c index 118528295fb7..846f10317bba 100644 --- a/drivers/dma/xilinx/xdma.c +++ b/drivers/dma/xilinx/xdma.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include @@ -713,6 +714,7 @@ static int xdma_set_vector_reg(struct xdma_device *xdev, u32 vec_tbl_start, static int xdma_irq_init(struct xdma_device *xdev) { u32 irq = xdev->irq_start; + u32 user_irq_start; int i, j, ret; /* return failure if there are not enough IRQs */ @@ -755,6 +757,18 @@ static int xdma_irq_init(struct xdma_device *xdev) goto failed_init_c2h; } + /* config user IRQ registers if needed */ + user_irq_start = XDMA_CHAN_NUM(xdev); + if (xdev->irq_num > user_irq_start) { + ret = xdma_set_vector_reg(xdev, XDMA_IRQ_USER_VEC_NUM, + user_irq_start, + xdev->irq_num - user_irq_start); + if (ret) { + xdma_err(xdev, "failed to set user vectors: %d", ret); + goto failed_init_c2h; + } + } + /* enable interrupt */ ret = xdma_write_reg(xdev, XDMA_IRQ_BASE, XDMA_IRQ_CHAN_INT_EN_W1S, ~0); if (ret) @@ -780,6 +794,77 @@ static bool xdma_filter_fn(struct dma_chan *chan, void *param) return chan_info->dir == xdma_chan->dir; } +/** + * xdma_disable_user_irq - Disable user interrupt + * @pdev: Pointer to the platform_device structure + * @irq_num: System IRQ number + */ +void xdma_disable_user_irq(struct platform_device *pdev, u32 irq_num) +{ + struct xdma_device *xdev = platform_get_drvdata(pdev); + u32 user_irq_index; + + user_irq_index = irq_num - xdev->irq_start; + if (user_irq_index < XDMA_CHAN_NUM(xdev) || + user_irq_index >= xdev->irq_num) { + xdma_err(xdev, "invalid user irq number"); + return; + } + user_irq_index -= XDMA_CHAN_NUM(xdev); + + xdma_write_reg(xdev, XDMA_IRQ_BASE, XDMA_IRQ_USER_INT_EN_W1C, + (1 << user_irq_index)); +} +EXPORT_SYMBOL(xdma_disable_user_irq); + +/** + * xdma_enable_user_irq - Enable user logic interrupt + * @pdev: Pointer to the platform_device structure + * @irq_num: System IRQ number + */ +int xdma_enable_user_irq(struct platform_device *pdev, u32 irq_num) +{ + struct xdma_device *xdev = platform_get_drvdata(pdev); + u32 user_irq_index; + int ret; + + user_irq_index = irq_num - xdev->irq_start; + if (user_irq_index < XDMA_CHAN_NUM(xdev) || + user_irq_index >= xdev->irq_num) { + xdma_err(xdev, "invalid user irq number"); + return -EINVAL; + } + user_irq_index -= XDMA_CHAN_NUM(xdev); + + ret = xdma_write_reg(xdev, XDMA_IRQ_BASE, XDMA_IRQ_USER_INT_EN_W1S, + (1 << user_irq_index)); + if (ret) + return ret; + + return 0; +} +EXPORT_SYMBOL(xdma_enable_user_irq); + +/** + * xdma_get_user_irq - Get system IRQ number + * @pdev: Pointer to the platform_device structure + * @user_irq_index: User logic IRQ wire index + * + * Return: The system IRQ number allocated for the given wire index. + */ +int xdma_get_user_irq(struct platform_device *pdev, u32 user_irq_index) +{ + struct xdma_device *xdev = platform_get_drvdata(pdev); + + if (XDMA_CHAN_NUM(xdev) + user_irq_index >= xdev->irq_num) { + xdma_err(xdev, "invalid user irq index"); + return -EINVAL; + } + + return xdev->irq_start + XDMA_CHAN_NUM(xdev) + user_irq_index; +} +EXPORT_SYMBOL(xdma_get_user_irq); + /** * xdma_remove - Driver remove function * @pdev: Pointer to the platform_device structure diff --git a/include/linux/dma/amd_xdma.h b/include/linux/dma/amd_xdma.h new file mode 100644 index 000000000000..ceba69ed7cb4 --- /dev/null +++ b/include/linux/dma/amd_xdma.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) 2022, Advanced Micro Devices, Inc. + */ + +#ifndef _DMAENGINE_AMD_XDMA_H +#define _DMAENGINE_AMD_XDMA_H + +#include +#include + +int xdma_enable_user_irq(struct platform_device *pdev, u32 irq_num); +void xdma_disable_user_irq(struct platform_device *pdev, u32 irq_num); +int xdma_get_user_irq(struct platform_device *pdev, u32 user_irq_index); + +#endif /* _DMAENGINE_AMD_XDMA_H */ -- 2.27.0