Received: by 2002:a05:6358:d09b:b0:dc:cd0c:909e with SMTP id jc27csp1482874rwb; Thu, 15 Dec 2022 10:34:00 -0800 (PST) X-Google-Smtp-Source: AA0mqf4YIQzQELWy6GJubwLuX5Owk4RhTFUNcSHKVmwFOrcapax+zBiH5xRYrWErCnDBZke9wM10 X-Received: by 2002:a17:90a:8a8b:b0:219:158d:61c2 with SMTP id x11-20020a17090a8a8b00b00219158d61c2mr29841512pjn.19.1671129240467; Thu, 15 Dec 2022 10:34:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671129240; cv=none; d=google.com; s=arc-20160816; b=LgyZenhZ5k6LH1Cyp33sdtB+P5n1T8ILTxzwF1ZTMloABDeKPUwFFfF+dSkOjAwoKY +gp1WDZLPPzPcn1IX8zOh+ETshdIY21hrLkDS4oHsdCcAqnq6dgPbhf1Mw4xDo1/Xasd BaNHMX5Byv9bocZ86HM3vlOKpXWztFZRgFm5FcI9vSXcT0gcLqPiuSBBB1gJvqLMgOIZ kZcRKfQhF/ElJjdQfq4J65/uxxNyDt2l0GdbdTKV8KswXb4zquH+L2mv9IqtdIn4x86B QVS5iwQ8EJ7Nmcm5/R7RWF8KCX9GRLEwOl8F4NxcfGOdWN4V8seoPBK9JoTOIfc3QXEc ufSw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=Fc6B+MxQ/VOFfwiPtVgS9//z1C3+kJ8yGalmdFMhPv8=; b=yBDJ4gqPB7zkOvSQdSjyN6B0cgHBXi24bnpYnOmrL7gONOI5rA7UxMArrjrEUKiXpg 85zmMBLimKxVYLSnRAJ9HNcUkEkpRCQIEbmpsqh8YxS0p1/CYtNQDL/xDeP+w5yn9pkB R0vRWUj5nAiVJ9riBgnPmT4Zsyc/WGCTgk4XqIqUnvAgcKhjEyv01Jdwf62vfJVap9b5 e8Hx04n0pj88df5P0B8MAGibGmNNk5srlUYf3oubDskmDOwLr1FFCJTZc3xvCtnS2o2b ZxtDnadIkvLx5BcjaMIuRFTShPSIj9AeRqza6qInXtqpICMwX7S8ZKW90QgGifJNG7Rc ik7w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=W4jtxJkD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=collabora.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h8-20020a17090acf0800b002187b138f98si5299944pju.165.2022.12.15.10.33.51; Thu, 15 Dec 2022 10:34:00 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=W4jtxJkD; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231144AbiLOSbw (ORCPT + 68 others); Thu, 15 Dec 2022 13:31:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55718 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230415AbiLOSaZ (ORCPT ); Thu, 15 Dec 2022 13:30:25 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7FC52C770; Thu, 15 Dec 2022 10:30:07 -0800 (PST) Received: from jupiter.universe (dyndsl-095-033-168-084.ewe-ip-backbone.de [95.33.168.84]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sre) by madras.collabora.co.uk (Postfix) with ESMTPSA id 365B56602C74; Thu, 15 Dec 2022 18:30:06 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1671129006; bh=wV+xB70dL/rAr5vw7rOX1NxQMtNjnz1aalkQwKIFdK4=; h=From:To:Cc:Subject:Date:From; b=W4jtxJkD9DGbxWiK4ww05mPg7dOhutW6O43JRQk7hUqlTEN/SdJF9ZKygwPfF8OcC oGsYWqogKundaqs7OyBheiENCMKwbprdp0jiBVdjyjipHOxKJ6KslWeJMP1W1e1StF lJVvAALzaqIabTQNn8pFr/2nfgudSltmhDKDPaETqiYXvj+U+SOOcqRI/mtoj++Pa9 fiJIiIBhukufGXe3DVSHyp38HGU+4QVYAlKYPwiBRLgoPk0JR0kUUb4t5/EnYrz4xs V2ZM1BJ6xqcQJoXHM5JITvxC7nYBZL9HG9r2AKkvGLktGwr62xoUe1yBMfmfh3lepj KOj+9fCvzh5wg== Received: by jupiter.universe (Postfix, from userid 1000) id 4A427480119; Thu, 15 Dec 2022 19:30:03 +0100 (CET) From: Sebastian Reichel To: Heiko Stuebner Cc: Rob Herring , Krzysztof Kozlowski , Marc Zyngier , Jagan Teki , Linus Walleij , Christopher Obbard , Benjamin Gaignard , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sebastian Reichel , kernel@collabora.com Subject: [PATCHv7 0/7] Initial rk3588 DT Date: Thu, 15 Dec 2022 19:29:55 +0100 Message-Id: <20221215183002.211081-1-sebastian.reichel@collabora.com> X-Mailer: git-send-email 2.39.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, This adds initial rk3588(s) DT including three different board devicetrees. All required driver changes have been merged into Linus tree already. To avoid warnings from $ make CHECK_DTBS=y rockchip/rk3588-evb1-v10.dtb \ rockchip/rk3588-rock-5b.dtb rockchip/rk3588s-rock-5a.dtb it is required to have dt-schema 2022.12 (older releases may generate warnings for the ethernet nodes) and c69bffe199270c ("dt-bindings: rtc: convert hym8563 bindings to json-schema") from rtc-next. Changes since PATCHv6: * https://lore.kernel.org/all/20221214182247.79824-1-sebastian.reichel@collabora.com/ * renamed ppi_cluster to ppi_partition * updated commit message of the third patch removing the incorrect "(single core)" and listing all added IP blocks. * removed brightness levels from EVB1 backlight; I kept the backlight node. It's the test case for PWM support. * rebase to current linus master (041fae9c105a) Changes since PATCHv5: * https://lore.kernel.org/all/20221205172350.75234-1-sebastian.reichel@collabora.com/ * modified GIC interrupts to use rk3399 style setup with two PPI partitions * add interrupt-names to the ARM timer node * add hyp-virt IRQ to the ARM timer node * re-add the #power-domain-cells for the power-controller sub-nodes and set to 0; the DT binding document requires it. I'm not sure why it was not pointed out by DTBS_CHECK when sending v4 and v5. Changes since PATCHv4: * https://lore.kernel.org/all/20221124144928.35381-1-sebastian.reichel@collabora.com/ * update compatible string for the PHY to provide PHY ID. Without the IDs provided in the firmware, the kernel tries to identify the correct driver by reading the ID. This fails, if the bootloader does not setup the reset GPIO, since the kernel only setups the reset GPIO in the PHY driver. Rock 5A with the default bootloader runs into this, but I also changed EVB1 since the kernel should not depend on bootloader configuration for this. * added pinctrl for PHY reset-gpios * drop rgmii-rxid from gmac1 node * added reviewed-by from Michael Risch for board DTs * I kept the order of the trailers (i.e. my SoB being the last), which is the usual order in most subsystems Changes since PATCHv3: * https://lore.kernel.org/all/20221121175814.68927-1-sebastian.reichel@collabora.com/ * update reset gpio + timings in EVB1 and Rock 5A DT to new style * change regulator- prefix to -regulator suffix in EVB1 and Rock 5B DTB * merge dt-binding update patches for EVB1, Rock 5A and Rock 5B and add Krzysztof's Ack * change pinctrl name "active" to "default" for all PWM nodes * remove aliases from rk3588s and rk3588 DTSI * sort includes in rk3588s.dtsi * add dma names for uart * some more property order fixes * remove #power-domain-cells for the power-controller sub-nodes; only the main node should be referenced * add dynamic-power-coefficient and #cooling-cells for all CPU cores Changes since PATCHv2: * https://lore.kernel.org/all/20221115161702.163057-1-sebastian.reichel@collabora.com/ * add minimal Radxa Rock 5B DT * Add aliases for i2c, spi and gpio in rk3588s.dtsi * Fix ethernet-phy node name and remove #phy-cells * Sort nodes / includes in both boards * Sort nodes in rk3588s.dtsi according to register address * add missing spi4 node in rk3588s.dtsi * split board specific dt-bindings into their own patches * add board specific mmc alias following the downstream enumeration Changes since PATCHv1: * https://lore.kernel.org/all/20221108171500.99599-1-sebastian.reichel@collabora.com/ * Drop Acked-by from Krzysztof * Add 'regulator-' prefix to VCC12V VCC5V0 regulators * Change 'Radxa Rock 5A' to 'Radxa ROCK 5 Model A' in DT binding * Update cover-letter (clock driver and some DT binding fixes got merged) -- Sebastian Christopher Obbard (1): arm64: dts: rockchip: Add rock-5b board Jianqun Xu (1): arm64: dts: rockchip: Add rk3588 pinctrl data Kever Yang (2): arm64: dts: rockchip: Add base DT for rk3588 SoC arm64: dts: rockchip: Add rk3588-evb1 board Sebastian Reichel (3): dt-bindings: soc: rockchip: add initial rk3588 syscon compatibles dt-bindings: arm: rockchip: add initial rk3588 boards arm64: dts: rockchip: Add rock-5a board .../devicetree/bindings/arm/rockchip.yaml | 15 + .../devicetree/bindings/soc/rockchip/grf.yaml | 5 + arch/arm64/boot/dts/rockchip/Makefile | 3 + .../boot/dts/rockchip/rk3588-evb1-v10.dts | 129 + .../boot/dts/rockchip/rk3588-pinctrl.dtsi | 516 +++ .../boot/dts/rockchip/rk3588-rock-5b.dts | 44 + arch/arm64/boot/dts/rockchip/rk3588.dtsi | 58 + .../boot/dts/rockchip/rk3588s-pinctrl.dtsi | 3403 +++++++++++++++++ .../boot/dts/rockchip/rk3588s-rock-5a.dts | 73 + arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 1703 +++++++++ 10 files changed, 5949 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3588.dtsi create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s-pinctrl.dtsi create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3588s.dtsi -- 2.39.0