Received: by 2002:a05:6358:d09b:b0:dc:cd0c:909e with SMTP id jc27csp2467340rwb; Fri, 16 Dec 2022 02:24:59 -0800 (PST) X-Google-Smtp-Source: AA0mqf7qe0c6qPHdhGvVdfDG4Y6obnJSGajxFYqYc/A33GuZQdleWSjqetxofzAmJm7qeYFmDi4k X-Received: by 2002:a05:6a20:b929:b0:ac:42f6:cace with SMTP id fe41-20020a056a20b92900b000ac42f6cacemr35364632pzb.43.1671186299148; Fri, 16 Dec 2022 02:24:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671186299; cv=none; d=google.com; s=arc-20160816; b=L59he8oF8bYhf8VU3G46F1d34N7YtnXni2MuTaSVF1iLmvarJ9jFfgQm11g00ro5Fi OWEG/ypdbTxfkwhvrj9o5a19+Nz5weECm8XHrqg6fO2cGHjb800oAQgGtgk3ecNsbqFo dmIOBzNwVajqdElO2TwUJ0kB93J1krBJNvR5RWBAGLUxgNxpjWIZI5+PsiAn+1OjUbdD bDWMYd76KMh9BqHY4A2UEq+DQ8NpVuVFstqBPGCNX3mdWjrb3FMkuJum6cMAm4XlhYou tHZvjScXJD2TmWd89U7ZIgOEwLQDvUxsSj1kTOPnNJm8kPfwL5LarbzC0cUhbDwfcA4t UQyQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=4avUJ6eT6timfJ1oT1Ic5+SQBnl6DCVHXqurbLuTIjU=; b=YcTSV2k55x08nZGSeaaOGPNNoQ3FpXIT3/CfZSeYyMp3c5UJgJyNNmBsJlc2jxJ3jA rTfxyms9WbbASVMwSLxaOANinXlE6ngGdf7BSrhIszvpOIOAOEMJ58XALqovCPyzwhE/ iZNGSHd7sLjv7uULnElOz8ePp3XTP1NBObHvxsnG7sOyYKyt4Q/Qd9wjT2p5VNVaJ8FO SkjRh/lOXXPlpWDlvLeE92A6UgrBbQF/bKz+sY7kB4ubNHeH/7YUweOzHNs4TFmzE6iu IFerc5p6ngyTri8+LXh1yEQCv1CR/unBdEpGSKFP8KwBBd/+j+FoC0iJZzB/TqP10lIv d2NQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=lXJMqzNh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id oc6-20020a17090b1c0600b0021336b17122si2487960pjb.5.2022.12.16.02.24.50; Fri, 16 Dec 2022 02:24:59 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=lXJMqzNh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230388AbiLPKXC (ORCPT + 68 others); Fri, 16 Dec 2022 05:23:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53194 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230350AbiLPKWm (ORCPT ); Fri, 16 Dec 2022 05:22:42 -0500 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D4EE63B9C4; Fri, 16 Dec 2022 02:22:34 -0800 (PST) Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2BG7Y37F004170; Fri, 16 Dec 2022 10:22:13 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=4avUJ6eT6timfJ1oT1Ic5+SQBnl6DCVHXqurbLuTIjU=; b=lXJMqzNh/CF0vWx2qQiGs8jbU5+wYQv9FhnbE+imAGrUdnEYfWCyblA2NxCJzjgM3TUa hyjm4d3I4W/haS6yFXwP5d4mt8oJGPyrt0KxlcgcG0esH4JpuJXi1I+ocHlfAHdyN+ds Pm9n+pV+AjMrneO+I/4b7YTTIKC88gcYYhoHPqpwglVMp26CMZBiI0nbw+hu8HcgF626 4bSHIe/rouNrTRywDEp1l80HiCqS59Bp1Cl7s3a/GKa0eP/h36TFy2JXGzXYrgWGMw/H olwpuQJ3dLER4yzHQqZfuNYKgZawgDK+yJc2Ru/XItslT0rzqzTWmOcUHzmkdAHRmBLf 5g== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3mg6tetsjp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Dec 2022 10:22:12 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2BGAMBN8011582 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Dec 2022 10:22:11 GMT Received: from hyd-lnxbld559.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Fri, 16 Dec 2022 02:22:06 -0800 From: Akhil P Oommen To: freedreno , , , Rob Clark , Ulf Hansson , Bjorn Andersson CC: Akhil P Oommen , Abhinav Kumar , Daniel Vetter , David Airlie , Dmitry Baryshkov , "Douglas Anderson" , Geert Uytterhoeven , Guenter Roeck , Konrad Dybcio , Sean Paul , Subject: [PATCH v2 3/5] drm/msm/a6xx: Vote for cx gdsc from gpu driver Date: Fri, 16 Dec 2022 15:51:22 +0530 Message-ID: <20221216155038.v2.3.I7f545d8494dcdbe6e96a15fbe8aaf5bb0c003d50@changeid> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1671186084-11356-1-git-send-email-quic_akhilpo@quicinc.com> References: <1671186084-11356-1-git-send-email-quic_akhilpo@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: SzrSRr7v_y2L1617TattmQNu83beTkIJ X-Proofpoint-GUID: SzrSRr7v_y2L1617TattmQNu83beTkIJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-16_06,2022-12-15_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 clxscore=1015 adultscore=0 mlxscore=0 bulkscore=0 spamscore=0 phishscore=0 mlxlogscore=999 lowpriorityscore=0 suspectscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2212160091 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When a device has multiple power domains, dev->power_domain is left empty during probe. That didn't cause any issue so far because we are freeloading on smmu driver's vote on cx gdsc. Instead of that, create a device_link between cx genpd device and gmu device to keep a vote from gpu driver. Before this patch: localhost ~ # cat /sys/kernel/debug/pm_genpd/pm_genpd_summary gx_gdsc on 0 /devices/genpd:1:3d6a000.gmu active 0 cx_gdsc on 0 /devices/platform/soc@0/3da0000.iommu active 0 After this patch: localhost ~ # cat /sys/kernel/debug/pm_genpd/pm_genpd_summary gx_gdsc on 0 /devices/genpd:1:3d6a000.gmu active 0 cx_gdsc on 0 /devices/platform/soc@0/3da0000.iommu active 0 /devices/genpd:0:3d6a000.gmu active 0 Signed-off-by: Akhil P Oommen --- (no changes since v1) drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 31 +++++++++++++++++++++++++++---- drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 1 + 2 files changed, 28 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index 6484b97c5344..1580d0090f35 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -1479,6 +1479,12 @@ void a6xx_gmu_remove(struct a6xx_gpu *a6xx_gpu) pm_runtime_force_suspend(gmu->dev); + /* + * Since cxpd is a virt device, the devlink with gmu-dev will be removed + * automatically when we do detach + */ + dev_pm_domain_detach(gmu->cxpd, false); + if (!IS_ERR_OR_NULL(gmu->gxpd)) { pm_runtime_disable(gmu->gxpd); dev_pm_domain_detach(gmu->gxpd, false); @@ -1605,8 +1611,10 @@ int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) if (adreno_is_a650_family(adreno_gpu)) { gmu->rscc = a6xx_gmu_get_mmio(pdev, "rscc"); - if (IS_ERR(gmu->rscc)) + if (IS_ERR(gmu->rscc)) { + ret = -ENODEV; goto err_mmio; + } } else { gmu->rscc = gmu->mmio + 0x23000; } @@ -1615,8 +1623,22 @@ int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) gmu->hfi_irq = a6xx_gmu_get_irq(gmu, pdev, "hfi", a6xx_hfi_irq); gmu->gmu_irq = a6xx_gmu_get_irq(gmu, pdev, "gmu", a6xx_gmu_irq); - if (gmu->hfi_irq < 0 || gmu->gmu_irq < 0) + if (gmu->hfi_irq < 0 || gmu->gmu_irq < 0) { + ret = -ENODEV; + goto err_mmio; + } + + gmu->cxpd = dev_pm_domain_attach_by_name(gmu->dev, "cx"); + if (IS_ERR(gmu->cxpd)) { + ret = PTR_ERR(gmu->cxpd); goto err_mmio; + } + + if (!device_link_add(gmu->dev, gmu->cxpd, + DL_FLAG_PM_RUNTIME)) { + ret = -ENODEV; + goto detach_cxpd; + } /* * Get a link to the GX power domain to reset the GPU in case of GMU @@ -1634,6 +1656,9 @@ int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) return 0; +detach_cxpd: + dev_pm_domain_detach(gmu->cxpd, false); + err_mmio: iounmap(gmu->mmio); if (platform_get_resource_byname(pdev, IORESOURCE_MEM, "rscc")) @@ -1641,8 +1666,6 @@ int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node) free_irq(gmu->gmu_irq, gmu); free_irq(gmu->hfi_irq, gmu); - ret = -ENODEV; - err_memory: a6xx_gmu_memory_free(gmu); err_put_device: diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.h b/drivers/gpu/drm/msm/adreno/a6xx_gmu.h index e034935b3986..5a42dd4dd31f 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.h +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.h @@ -56,6 +56,7 @@ struct a6xx_gmu { int gmu_irq; struct device *gxpd; + struct device *cxpd; int idle_level; -- 2.7.4