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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id i5-20020a2ea365000000b002771057e0e5sm127207ljn.76.2022.12.16.03.15.31 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 16 Dec 2022 03:15:32 -0800 (PST) Message-ID: <994718d8-f3ee-af5e-bda7-f913f66597ce@linaro.org> Date: Fri, 16 Dec 2022 12:15:31 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.5.1 Subject: Re: [PATCH v2 5/9] dt-bindings: net: motorcomm: add support for Motorcomm YT8531 Content-Language: en-US To: Yanhong Wang , linux-riscv@lists.infradead.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Emil Renner Berthing , Richard Cochran , Andrew Lunn , Heiner Kallweit , Peter Geis References: <20221216070632.11444-1-yanhong.wang@starfivetech.com> <20221216070632.11444-6-yanhong.wang@starfivetech.com> From: Krzysztof Kozlowski In-Reply-To: <20221216070632.11444-6-yanhong.wang@starfivetech.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 16/12/2022 08:06, Yanhong Wang wrote: > Add support for Motorcomm Technology YT8531 10/100/1000 Ethernet PHY. > The document describe details of clock delay train configuration. > > Signed-off-by: Yanhong Wang Missing vendor prefix documentation. I don't think you tested this at all with checkpatch and dt_binding_check. > --- > .../bindings/net/motorcomm,yt8531.yaml | 111 ++++++++++++++++++ > MAINTAINERS | 1 + > 2 files changed, 112 insertions(+) > create mode 100644 Documentation/devicetree/bindings/net/motorcomm,yt8531.yaml > > diff --git a/Documentation/devicetree/bindings/net/motorcomm,yt8531.yaml b/Documentation/devicetree/bindings/net/motorcomm,yt8531.yaml > new file mode 100644 > index 000000000000..c5b8a09a78bb > --- /dev/null > +++ b/Documentation/devicetree/bindings/net/motorcomm,yt8531.yaml > @@ -0,0 +1,111 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/net/motorcomm,yt8531.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Motorcomm YT8531 Gigabit Ethernet PHY > + > +maintainers: > + - Yanhong Wang > + Why there is no reference to ethernet-phy.yaml? > +select: > + properties: > + $nodename: > + pattern: "^ethernet-phy(@[a-f0-9]+)?$" I don't think that's correct approach. You know affect all phys. > + > + required: > + - $nodename > + > +properties: > + $nodename: > + pattern: "^ethernet-phy(@[a-f0-9]+)?$" Just reference ethernet-phy.yaml. > + > + reg: > + minimum: 0 > + maximum: 31 > + description: > + The ID number for the PHY. Drop duplicated properties. > + > + rxc_dly_en: No underscores in node names. Missing vendor prefix. Both apply to all your other custom properties, unless they are not custom but generic. Missing ref. > + description: | > + RGMII Receive PHY Clock Delay defined with fixed 2ns.This is used for After every full stop goes space. > + PHY that have configurable RX internal delays. If this property set > + to 1, then automatically add 2ns delay pad for Receive PHY clock. Nope, this is wrong. You wrote now boolean property as enum. > + enum: [0, 1] > + default: 0 > + > + rx_delay_sel: > + description: | > + This is supplement to rxc_dly_en property,and it can > + be specified in 150ps(pico seconds) steps. The effective > + delay is: 150ps * N. Nope. Use proper units and drop all this register stuff. > + minimum: 0 > + maximum: 15 > + default: 0 > + > + tx_delay_sel_fe: > + description: | > + RGMII Transmit PHY Clock Delay defined in pico seconds.This is used for > + PHY's that have configurable TX internal delays when speed is 100Mbps > + or 10Mbps. It can be specified in 150ps steps, the effective delay > + is: 150ps * N. The binding is in very poor shape. Please look carefully in example-schema. All my previous comments apply everywhere. > + minimum: 0 > + maximum: 15 > + default: 15 > + > + tx_delay_sel: > + description: | > + RGMII Transmit PHY Clock Delay defined in pico seconds.This is used for > + PHY's that have configurable TX internal delays when speed is 1000Mbps. > + It can be specified in 150ps steps, the effective delay is: 150ps * N. > + minimum: 0 > + maximum: 15 > + default: 1 > + > + tx_inverted_10: > + description: | > + Use original or inverted RGMII Transmit PHY Clock to drive the RGMII > + Transmit PHY Clock delay train configuration when speed is 10Mbps. > + 0: original 1: inverted > + enum: [0, 1] > + default: 0 > + > + tx_inverted_100: > + description: | > + Use original or inverted RGMII Transmit PHY Clock to drive the RGMII > + Transmit PHY Clock delay train configuration when speed is 100Mbps. > + 0: original 1: inverted > + enum: [0, 1] > + default: 0 > + > + tx_inverted_1000: > + description: | > + Use original or inverted RGMII Transmit PHY Clock to drive the RGMII > + Transmit PHY Clock delay train configuration when speed is 1000Mbps. > + 0: original 1: inverted > + enum: [0, 1] > + default: 0 > + > +required: > + - reg > + > +additionalProperties: true This must be false. After referencing ethernet-phy this should be unevaluatedProperties: false. Best regards, Krzysztof