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Message-ID: <06e969b5-3be2-4b23-de5a-93aa9ae6d95c@gmail.com>
Date:   Fri, 16 Dec 2022 12:53:13 +0100
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Subject: Re: [PATCH 0/5] Add CPU caches information for some MediaTek SoCs
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To:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>
Cc:     robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
        nfraprado@collabora.com, kernel@collabora.com,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org
References: <20221206112330.78431-1-angelogioacchino.delregno@collabora.com>
From:   Matthias Brugger <matthias.bgg@gmail.com>
In-Reply-To: <20221206112330.78431-1-angelogioacchino.delregno@collabora.com>
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On 06/12/2022 12:23, AngeloGioacchino Del Regno wrote:
> In devicetrees for MediaTek SoCs the CPU caches information, if
> present, is incomplete as it misses cache size, cache line size
> and number of cache sets which, in turn, will also prevent any
> cache associativity calculation.
> 
> For all of the SoCs that I know and/or I have information for,
> I've added the right information for I/D, L2 and L3 where present.
> This will also make the cacheinfo driver to correctly export the
> CPU cache information to sysfs.
> 

Whole series applied, thanks!

> AngeloGioacchino Del Regno (5):
>    arm64: dts: mt8195: Add complete CPU caches information
>    arm64: dts: mt8192: Add complete CPU caches information
>    arm64: dts: mt8186: Add complete CPU caches information
>    arm64: dts: mt8183: Add complete CPU caches information
>    arm64: dts: mt6795: Add complete CPU caches information
> 
>   arch/arm64/boot/dts/mediatek/mt6795.dtsi | 50 ++++++++++++++++
>   arch/arm64/boot/dts/mediatek/mt8183.dtsi | 74 ++++++++++++++++++++++++
>   arch/arm64/boot/dts/mediatek/mt8186.dtsi | 58 +++++++++++++++++++
>   arch/arm64/boot/dts/mediatek/mt8192.dtsi | 58 +++++++++++++++++++
>   arch/arm64/boot/dts/mediatek/mt8195.dtsi | 58 +++++++++++++++++++
>   5 files changed, 298 insertions(+)
>