Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935956AbXHOUQk (ORCPT ); Wed, 15 Aug 2007 16:16:40 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1763141AbXHOUQ1 (ORCPT ); Wed, 15 Aug 2007 16:16:27 -0400 Received: from gate.crashing.org ([63.228.1.57]:60926 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759521AbXHOUQZ (ORCPT ); Wed, 15 Aug 2007 16:16:25 -0400 In-Reply-To: <20070815195915.GL9645@linux.vnet.ibm.com> References: <46BCC26B.6080600@redhat.com> <46BB46B2.60808@redhat.com> <20070809134150.GA14890@shell.boston.redhat.com> <2708.1186737826@redhat.com> <7680.1186822071@redhat.com> <46BFFDBD.6080804@redhat.com> <46C140DD.3060509@yahoo.com.au> <2cbda24e96a49c3ab7cf7039c515f9fc@kernel.crashing.org> <20070815191829.GJ9645@linux.vnet.ibm.com> <369924c4b3132a4b06258b7ac81b1006@kernel.crashing.org> <20070815195915.GL9645@linux.vnet.ibm.com> Mime-Version: 1.0 (Apple Message framework v623) Content-Type: text/plain; charset=US-ASCII; format=flowed Message-Id: Content-Transfer-Encoding: 7bit Cc: heiko.carstens@de.ibm.com, horms@verge.net.au, linux-kernel@vger.kernel.org, rpjday@mindspring.com, ak@suse.de, netdev@vger.kernel.org, cfriesen@nortel.com, akpm@linux-foundation.org, torvalds@linux-foundation.org, Nick Piggin , linux-arch@vger.kernel.org, jesper.juhl@gmail.com, zlynx@acm.org, schwidefsky@de.ibm.com, Chris Snook , davem@davemloft.net, wensong@linux-vs.org, wjiang@resilience.com, David Howells From: Segher Boessenkool Subject: Re: [PATCH 6/24] make atomic_read() behave consistently on frv Date: Wed, 15 Aug 2007 22:13:49 +0200 To: paulmck@linux.vnet.ibm.com X-Mailer: Apple Mail (2.623) Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1220 Lines: 36 >>>>> Well if there is only one memory location involved, then smp_rmb() >>>>> isn't >>>>> going to really do anything anyway, so it would be incorrect to use >>>>> it. >>>> >>>> rmb() orders *any* two reads; that includes two reads from the same >>>> location. >>> >>> If the two reads are to the same location, all CPUs I am aware of >>> will maintain the ordering without need for a memory barrier. >> >> That's true of course, although there is no real guarantee for that. > > A CPU that did not provide this property ("cache coherence") would be > most emphatically reviled. That doesn't have anything to do with coherency as far as I can see. It's just about the order in which a CPU (speculatively) performs the loads (which isn't necessarily the same as the order in which it executes the corresponding instructions, even). > So we are pretty safe assuming that CPUs > will provide it. Yeah, pretty safe. I just don't like undocumented assumptions :-) Segher - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/