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Fri, 16 Dec 2022 23:02:00 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2BGN1xk1007518 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 16 Dec 2022 23:01:59 GMT Received: from [10.110.127.101] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Fri, 16 Dec 2022 15:01:58 -0800 Message-ID: <9a1db357-9cd4-1217-83b0-c146e7e29233@quicinc.com> Date: Fri, 16 Dec 2022 15:01:57 -0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.2 Subject: Re: [RFC PATCH 4/6] drm/msm/dsi: Use DSC slice(s) packet size to compute word count Content-Language: en-US To: Marijn Suijten , , Rob Clark , "Dmitry Baryshkov" , Vinod Koul CC: <~postmarketos/upstreaming@lists.sr.ht>, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Sean Paul , David Airlie , Daniel Vetter , "Stephen Boyd" , Bjorn Andersson , "Jessica Zhang" , =?UTF-8?B?VmlsbGUgU3lyasOkbMOk?= , Kuogee Hsieh , "Jani Nikula" , sunliming , "Sam Ravnborg" , Haowen Bai , Konrad Dybcio , Loic Poulain , "Vinod Polimera" , Douglas Anderson , Vladimir Lypak , , , , References: <20221213232207.113607-1-marijn.suijten@somainline.org> <20221213232207.113607-5-marijn.suijten@somainline.org> From: Abhinav Kumar In-Reply-To: <20221213232207.113607-5-marijn.suijten@somainline.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: YXCtgRzGELZyiA7aU8oSVhMnNTf3DWRf X-Proofpoint-ORIG-GUID: YXCtgRzGELZyiA7aU8oSVhMnNTf3DWRf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-16_14,2022-12-15_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 suspectscore=0 clxscore=1015 phishscore=0 malwarescore=0 lowpriorityscore=0 spamscore=0 bulkscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2212160203 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_LOW, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12/13/2022 3:22 PM, Marijn Suijten wrote: > According to downstream the value to use for WORD_COUNT is > bytes_per_pkt, which denotes the number of bytes in a packet based on > how many slices have been configured by the panel driver times the > width of a slice times the number of bytes per pixel. > > The DSC panels seen thus far use one byte per pixel, only one slice > per packet, and a slice width of half the panel width leading to the > desired bytes_per_pkt+1 value to be equal to hdisplay/2+1. This however > isn't the case anymore for panels that configure two slices per packet, > where the value should now be hdisplay+1. > > Note that the aforementioned panel (on a Sony Xperia XZ3, sdm845) with > slice_count=1 has also been tested to successfully accept slice_count=2, > which would have shown corrupted output previously. > > Fixes: 08802f515c3c ("drm/msm/dsi: Add support for DSC configuration") > Signed-off-by: Marijn Suijten Reviewed-by: Abhinav Kumar > --- > drivers/gpu/drm/msm/dsi/dsi_host.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c > index b83cf70b1adb..0686c35a6fd4 100644 > --- a/drivers/gpu/drm/msm/dsi/dsi_host.c > +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c > @@ -989,7 +989,7 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) > if (!msm_host->dsc) > wc = hdisplay * dsi_get_bpp(msm_host->format) / 8 + 1; > else > - wc = mode->hdisplay / 2 + 1; > + wc = msm_host->dsc->slice_chunk_size * msm_host->dsc->slice_count + 1; > > dsi_write(msm_host, REG_DSI_CMD_MDP_STREAM0_CTRL, > DSI_CMD_MDP_STREAM0_CTRL_WORD_COUNT(wc) |