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From:   Fabrizio Castro <fabrizio.castro.jz@renesas.com>
To:     Rob Herring <robh@kernel.org>
CC:     Linus Walleij <linus.walleij@linaro.org>,
        Bartosz Golaszewski <brgl@bgdev.pl>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Sebastian Reichel <sre@kernel.org>,
        Geert Uytterhoeven <geert+renesas@glider.be>,
        Lee Jones <lee@kernel.org>,
        "linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
        Chris Paterson <Chris.Paterson2@renesas.com>,
        Biju Das <biju.das@bp.renesas.com>,
        "linux-renesas-soc@vger.kernel.org" 
        <linux-renesas-soc@vger.kernel.org>,
        Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
        Jacopo Mondi <jacopo@jmondi.org>
Subject: RE: [PATCH 3/5] dt-bindings: mfd: Add RZ/V2M PWC global registers
 bindings
Thread-Topic: [PATCH 3/5] dt-bindings: mfd: Add RZ/V2M PWC global registers
 bindings
Thread-Index: AQHZD0RWUdljgAcvZkylOB1He+HHvK5tkDWAgAm+C+A=
Date:   Tue, 20 Dec 2022 21:09:29 +0000
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References: <20221213224310.543243-1-fabrizio.castro.jz@renesas.com>
 <20221213224310.543243-4-fabrizio.castro.jz@renesas.com>
 <20221214161607.GA1154595-robh@kernel.org>
In-Reply-To: <20221214161607.GA1154595-robh@kernel.org>
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Hi Rob,

Thanks for the feeback.

> From: Rob Herring <robh@kernel.org>
> Sent: 14 December 2022 16:16
> To: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
> Subject: Re: [PATCH 3/5] dt-bindings: mfd: Add RZ/V2M PWC global register=
s
> bindings
>=20
> On Tue, Dec 13, 2022 at 10:43:08PM +0000, Fabrizio Castro wrote:
> > The RZ/V2M PWC is a multi-function device, and its software
> > support relies on "syscon" and "simple-mfd".
> > Add the dt-bindings for the top level device tree node.
> >
> > Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
> > ---
> >  .../bindings/mfd/renesas,rzv2m-pwc.yaml       | 70 +++++++++++++++++++
> >  1 file changed, 70 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/mfd/renesas,rzv2m=
-
> pwc.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/mfd/renesas,rzv2m-
> pwc.yaml b/Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml
> > new file mode 100644
> > index 000000000000..a7e180bfbd83
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml
> > @@ -0,0 +1,70 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +
> > +title: Renesas RZ/V2M External Power Sequence Controller (PWC)
> > +
> > +description: |+
> > +  The PWC IP found in the RZ/V2M family of chips comes with the below
> > +  capabilities
> > +    - external power supply on/off sequence generation
> > +    - on/off signal generation for the LPDDR4 core power supply (LPVDD=
)
> > +    - key input signals processing
> > +    - general-purpose output pins
> > +
> > +maintainers:
> > +  - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - enum:
> > +          - renesas,r9a09g011-pwc # RZ/V2M
> > +          - renesas,r9a09g055-pwc # RZ/V2MA
> > +      - const: renesas,rzv2m-pwc
> > +      - const: syscon
> > +      - const: simple-mfd
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  gpio:
> > +    type: object
> > +    $ref: /schemas/gpio/renesas,rzv2m-pwc-gpio.yaml#
> > +    description: General-Purpose Output pins controller.
> > +
> > +  poweroff:
> > +    type: object
> > +    $ref: /schemas/power/reset/renesas,rzv2m-pwc-poweroff.yaml#
> > +    description: Power OFF controller.
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    pwc: pwc@a3700000 {
> > +            compatible =3D "renesas,r9a09g011-pwc", "renesas,rzv2m-pwc=
",
> "syscon",
> > +                         "simple-mfd";
> > +            reg =3D <0xa3700000 0x800>;
> > +
> > +            gpio {
> > +                    compatible =3D "renesas,r9a09g011-pwc-gpio",
> > +                                 "renesas,rzv2m-pwc-gpio";
> > +                    regmap =3D <&pwc>;
> > +                    offset =3D <0x80>;
> > +                    gpio-controller;
> > +                    #gpio-cells =3D <2>;
> > +            };
> > +
> > +            poweroff {
> > +                    compatible =3D "renesas,r9a09g011-pwc-poweroff",
> > +                                 "renesas,rzv2m-pwc-poweroff";
> > +                    regmap =3D <&pwc>;
>=20
> Why does this need to be a child node? There aren't any resources for
> it. 'regmap' is just the parent node.
>=20
> Assuming this binding is complete, I don't think you need any child
> nodes. A single node can have multiple providers.

Alright, then I'll just put everything the device needs into a single
node. I'll send v2 based on the below snippet:

    pwc@a3700000 {
      compatible =3D "renesas,r9a09g011-pwc", "renesas,rzv2m-pwc";
      reg =3D <0xa3700000 0x800>;
      gpio-controller;
      #gpio-cells =3D <2>;
      renesas,rzv2m-pwc-power;
    };

Thanks,
Fab

>=20
> Rob