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[2620:137:e000::1:20]) by mx.google.com with ESMTP id q193-20020a632aca000000b00477c8f621ffsi15837266pgq.657.2022.12.20.19.49.02; Tue, 20 Dec 2022 19:49:12 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=Zh89NlVw; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234468AbiLUDop (ORCPT + 69 others); Tue, 20 Dec 2022 22:44:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49598 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234418AbiLUDo0 (ORCPT ); Tue, 20 Dec 2022 22:44:26 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E42FE1EC47; Tue, 20 Dec 2022 19:44:21 -0800 (PST) X-UUID: 1d5c2dab3bb34c53bb97e88bb7775408-20221221 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=XxTUsxvSetrznStelFhNNQIH6eOjSESJoSSPJi/S8LM=; b=Zh89NlVwIadK/gINaK3ozStM+JhzOLIA262HcQBvmMa30OF04jzpLtQUJ1XMF0pa9EuuH/Tnxw2BMsKwvZ7LOht+U+P1lsCAeW5jKc03oEprSx7Ki9GRNi9nrnQMrWfXb6Qfm8JXtTNqpiWmsSUpuw5VhRLdats+KAO8GnQQGjI=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.14,REQID:d9650126-5244-41cf-a1e4-d8a17e47deb9,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:dcaaed0,CLOUDID:c69df489-8530-4eff-9f77-222cf6e2895b,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 1d5c2dab3bb34c53bb97e88bb7775408-20221221 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1439173342; Wed, 21 Dec 2022 11:44:13 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Wed, 21 Dec 2022 11:44:12 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Wed, 21 Dec 2022 11:44:12 +0800 From: Allen-KH Cheng To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger , Chun-Jie Chen , "Stephen Boyd" , Ikjoon Jang CC: , , , , , , Chen-Yu Tsai , Allen-KH Cheng Subject: [PATCH v2 3/6] dt-bindings: power: Add MT8192 ADSP power domain Date: Wed, 21 Dec 2022 11:44:04 +0800 Message-ID: <20221221034407.19605-4-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221221034407.19605-1-allen-kh.cheng@mediatek.com> References: <20221221034407.19605-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N X-Spam-Status: No, score=-1.3 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,RDNS_NONE, SPF_HELO_PASS,SPF_PASS,UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add power domain ID for the ADSP power partition found on MT8192 SoC. Signed-off-by: Allen-KH Cheng Acked-by: Krzysztof Kozlowski --- include/dt-bindings/power/mt8192-power.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/dt-bindings/power/mt8192-power.h b/include/dt-bindings/power/mt8192-power.h index 4eaa53d7270a..63e81cd0d06d 100644 --- a/include/dt-bindings/power/mt8192-power.h +++ b/include/dt-bindings/power/mt8192-power.h @@ -28,5 +28,6 @@ #define MT8192_POWER_DOMAIN_CAM_RAWA 18 #define MT8192_POWER_DOMAIN_CAM_RAWB 19 #define MT8192_POWER_DOMAIN_CAM_RAWC 20 +#define MT8192_POWER_DOMAIN_ADSP 21 #endif /* _DT_BINDINGS_POWER_MT8192_POWER_H */ -- 2.18.0