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McKenney" , rcu@vger.kernel.org, Steven Rostedt References: <6438d903-ab97-48c7-c338-9f0bc2686f94@efficios.com> <7A9876BA-C375-42A7-A5C9-FD940D2898D7@joelfernandes.org> <5bd5ee4a-710a-96bc-abe8-772b2e60f478@efficios.com> <20221220225756.GB26563@lothringen> From: Mathieu Desnoyers In-Reply-To: <20221220225756.GB26563@lothringen> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-3.3 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2022-12-20 17:57, Frederic Weisbecker wrote: > On Tue, Dec 20, 2022 at 02:01:30PM -0500, Mathieu Desnoyers wrote: >> On 2022-12-20 13:29, Joel Fernandes wrote: >>> >> >>> I do want to finish my memory barrier studies of SRCU over the holidays since I have been deep in the hole with that already. Back to the post flip memory barrier here since I think now even that might not be needed… >> >> I strongly suspect the memory barrier after flip is useless for the same >> reasons I mentioned explaining why the barrier before the flip is useless. >> >> However, we need to double-check that we have memory barriers at the >> beginning and end of synchronize_srcu, and between load of "unlock" counters >> and load of "lock" counters. >> >> Where is the barrier at the beginning of synchronize_srcu ? > > rcu_seq_snap() ? The memory barrier in rcu_seq_snap is not at the very beginning of synchronize_srcu. For example we have: unsigned long get_state_synchronize_srcu(struct srcu_struct *ssp) { // Any prior manipulation of SRCU-protected data must happen // before the load from ->srcu_gp_seq. smp_mb(); return rcu_seq_snap(&ssp->srcu_gp_seq); which happens to have an explicit barrier before issuing rcu_seq_snap(). So my question still stands: where is the memory barrier at the beginning of synchronize_srcu ? The memory ordering constraint I am concerned about here is: * [...] In addition, * each CPU having an SRCU read-side critical section that extends beyond * the return from synchronize_srcu() is guaranteed to have executed a * full memory barrier after the beginning of synchronize_srcu() and before * the beginning of that SRCU read-side critical section. [...] So if we have a SRCU read-side critical section that begins after the beginning of synchronize_srcu, but before its first memory barrier, it would miss the guarantee that the full memory barrier is issued before the beginning of that SRCU read-side critical section. IOW, that memory barrier needs to be at the very beginning of the grace period. I suspect that the memory barrier in srcu_read_lock() invoked by srcu_gp_start_if_needed may happen to be early enough, but I'm not sure, and it does not appear to be documented as such. Thanks, Mathieu > >> >> Thanks, >> >> Mathieu >> >> -- >> Mathieu Desnoyers >> EfficiOS Inc. >> https://www.efficios.com >> -- Mathieu Desnoyers EfficiOS Inc. https://www.efficios.com