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Message-ID: <e7edd629-986f-3e64-f9db-5ee68cf4e6f3@quicinc.com>
Date:   Wed, 21 Dec 2022 18:48:07 +0530
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Subject: Re: [PATCH 2/2] clk: qcom: lpasscc: Add resets for SC7280 audioreach
 clock controller
Content-Language: en-US
To:     Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
        <swboyd@chromium.org>, <agross@kernel.org>, <andersson@kernel.org>,
        <robh+dt@kernel.org>, <broonie@kernel.org>,
        <quic_plai@quicinc.com>, <krzysztof.kozlowski+dt@linaro.org>,
        <konrad.dybcio@somainline.org>, <mturquette@baylibre.com>,
        <sboyd@kernel.org>, <linux-arm-msm@vger.kernel.org>,
        <linux-clk@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <quic_rohkumar@quicinc.com>
References: <1671618061-6329-1-git-send-email-quic_srivasam@quicinc.com>
 <1671618061-6329-3-git-send-email-quic_srivasam@quicinc.com>
 <efde6373-f788-5c0c-4712-7b9caf7ad3d4@linaro.org>
From:   Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Organization: Qualcomm
In-Reply-To: <efde6373-f788-5c0c-4712-7b9caf7ad3d4@linaro.org>
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On 12/21/2022 4:09 PM, Krzysztof Kozlowski wrote:
Thanks for your time Krzysztof!!!
> On 21/12/2022 11:21, Srinivasa Rao Mandadapu wrote:
>> The clock gating control for TX/RX/WSA core bus clocks would be required
>> to be reset(moved from hardware control) from audio core driver. Thus
>> add the support for the reset clocks in audioreach based clock driver.
>>
>> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
>> ---
>>   drivers/clk/qcom/lpasscc-sc7280.c | 18 ++++++++++++++++++
>>   1 file changed, 18 insertions(+)
>>
>> diff --git a/drivers/clk/qcom/lpasscc-sc7280.c b/drivers/clk/qcom/lpasscc-sc7280.c
>> index 5c1e17b..d81d81b 100644
>> --- a/drivers/clk/qcom/lpasscc-sc7280.c
>> +++ b/drivers/clk/qcom/lpasscc-sc7280.c
>> @@ -12,10 +12,12 @@
>>   #include <linux/regmap.h>
>>   
>>   #include <dt-bindings/clock/qcom,lpass-sc7280.h>
>> +#include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
> These are bindings for different device.

They are not exactly for different device. It's for same device with 
ADSP enabled platforms.

Basically lpassaudiocc-sc7280.c and lpasscorecc-sc7280.c are for legacy 
path.

lpasscc-sc7280.c is for ADSP based AudioReach Solution.

>
>>   
>>   #include "clk-regmap.h"
>>   #include "clk-branch.h"
>>   #include "common.h"
>> +#include "reset.h"
>>   
>>   static struct clk_branch lpass_top_cc_lpi_q6_axim_hs_clk = {
>>   	.halt_reg = 0x0,
>> @@ -102,6 +104,18 @@ static const struct qcom_cc_desc lpass_qdsp6ss_sc7280_desc = {
>>   	.num_clks = ARRAY_SIZE(lpass_qdsp6ss_sc7280_clocks),
>>   };
>>   
>> +static const struct qcom_reset_map lpass_cc_sc7280_resets[] = {
>> +	[LPASS_AUDIO_SWR_RX_CGCR] =  { 0xa0, 1 },
>> +	[LPASS_AUDIO_SWR_TX_CGCR] =  { 0xa8, 1 },
>> +	[LPASS_AUDIO_SWR_WSA_CGCR] = { 0xb0, 1 },
> These are example the same - IDs and values - as
> qcom,sc7280-lpassaudiocc. Aren't you duplicating same control?

As explained above legacy path drivers and ADSP path drivers are 
enabled/used exclusively,

adding reset controls here.

>
> Best regards,
> Krzysztof
>