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From:   Saleem Abdulrasool <abdulras@google.com>
Date:   Wed, 21 Dec 2022 09:39:02 -0800
Message-ID: <CAO8XFHv_wV_oSuS+e412yr6vjm-44Vf2gJuMO4FvgPeodhWQww@mail.gmail.com>
Subject: Re: [PATCH] riscv: avoid enabling vectorized code generation
To:     Bin Meng <bmeng.cn@gmail.com>
Cc:     Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
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On Wed, Dec 21, 2022 at 8:17 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> Hi,
>
> On Sat, Dec 17, 2022 at 3:12 AM Saleem Abdulrasool <abdulras@google.com> wrote:
> >
> > The compiler is free to generate vectorized operations for zero'ing
> > memory.  The kernel does not use the vector unit on RISCV, similar to
> > architectures such as x86 where we use `-mno-mmx` et al to prevent the
> > implicit vectorization.  Perform a similar check for
> > `-mno-implicit-float` to avoid this on RISC-V targets.
> >
> > Signed-off-by: Saleem Abdulrasool <abdulras@google.com>
> > ---
> >  arch/riscv/Makefile | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
> > index 0d13b597cb55..68433476a96e 100644
> > --- a/arch/riscv/Makefile
> > +++ b/arch/riscv/Makefile
> > @@ -89,6 +89,10 @@ KBUILD_AFLAGS_MODULE += $(call as-option,-Wa$(comma)-mno-relax)
> >  # architectures.  It's faster to have GCC emit only aligned accesses.
> >  KBUILD_CFLAGS += $(call cc-option,-mstrict-align)
> >
> > +# Ensure that we do not vectorize the kernel code when the `v` extension is
> > +# enabled.  This mirrors the `-mno-mmx` et al on x86.
> > +KBUILD_CFLAGS += $(call cc-option,-mno-implicit-float)
>
> This looks like an LLVM flag, but not GCC.

Correct, this is a clang flag, though I imagine that GCC will need a
similar flag once it receives support for the V extension.

> Can you elaborate what exact combination (compiler flag and source)
> would cause an issue?

The particular case that I was using was simply `clang -target
riscv64-unknown-linux-musl -march=rv64gcv` off of main.

> From your description, I guess it's that when enabling V extension in
> LLVM, the compiler tries to use vector instructions to zero memory,
> correct?

Correct.

> Can you confirm LLVM does not emit any float instructions (like F/D
> extensions) because the flag name suggests something like "float"?

The `-mno-implicit-float` should disable any such emission.  I assume
that you are worried about the case without the flag?  I'm not 100%
certain without this flag, but the RISCV build with this flag has been
running smoothly locally for a while.


> > +
> >  ifeq ($(CONFIG_STACKPROTECTOR_PER_TASK),y)
> >  prepare: stack_protector_prepare
> >  stack_protector_prepare: prepare0
> > --
>
> Regards,
> Bin