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[2620:137:e000::1:20]) by mx.google.com with ESMTP id h3-20020a056a001a4300b005631aaf81f2si1625859pfv.183.2022.12.22.13.32.10; Thu, 22 Dec 2022 13:32:20 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229973AbiLVVB4 (ORCPT + 69 others); Thu, 22 Dec 2022 16:01:56 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39404 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229613AbiLVVBy (ORCPT ); Thu, 22 Dec 2022 16:01:54 -0500 Received: from relay05.th.seeweb.it (relay05.th.seeweb.it [5.144.164.166]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4230162D2 for ; Thu, 22 Dec 2022 13:01:52 -0800 (PST) Received: from localhost.localdomain (94-209-172-39.cable.dynamic.v4.ziggo.nl [94.209.172.39]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r2.th.seeweb.it (Postfix) with ESMTPSA id 2F6DC3F34C; Thu, 22 Dec 2022 22:01:50 +0100 (CET) From: Marijn Suijten To: phone-devel@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Jami Kettunen , Marijn Suijten , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , AngeloGioacchino Del Regno , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] clk: qcom: dispcc-sm6125: Fix compatible string to match bindings Date: Thu, 22 Dec 2022 22:01:40 +0100 Message-Id: <20221222210140.278077-1-marijn.suijten@somainline.org> X-Mailer: git-send-email 2.39.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org According to generic rules the SoC name should be first: arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dtb: clock-controller@5f00000: compatible: 'oneOf' conditional failed, one must be fixed: 'qcom,dispcc-sm6125' does not match '^qcom,(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+-.*$' And this is already reflected by the bindings submitted prior to the addition of this driver. Any DTS following these rules will end up with a non-probing driver because of this mismatch. Fixes: 6e87c8f07407 ("clk: qcom: Add display clock controller driver for SM6125") Signed-off-by: Marijn Suijten --- drivers/clk/qcom/dispcc-sm6125.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/qcom/dispcc-sm6125.c b/drivers/clk/qcom/dispcc-sm6125.c index b921456a2e0d..87b27053ddb6 100644 --- a/drivers/clk/qcom/dispcc-sm6125.c +++ b/drivers/clk/qcom/dispcc-sm6125.c @@ -667,7 +667,7 @@ static const struct qcom_cc_desc disp_cc_sm6125_desc = { }; static const struct of_device_id disp_cc_sm6125_match_table[] = { - { .compatible = "qcom,dispcc-sm6125" }, + { .compatible = "qcom,sm6125-dispcc" }, { } }; MODULE_DEVICE_TABLE(of, disp_cc_sm6125_match_table); -- 2.39.0