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Date:   Fri, 23 Dec 2022 16:12:13 +0800
From:   Huang Rui <ray.huang@amd.com>
To:     "Yuan, Perry" <Perry.Yuan@amd.com>
Cc:     "rafael.j.wysocki@intel.com" <rafael.j.wysocki@intel.com>,
        "Limonciello, Mario" <Mario.Limonciello@amd.com>,
        "viresh.kumar@linaro.org" <viresh.kumar@linaro.org>,
        "Sharma, Deepak" <Deepak.Sharma@amd.com>,
        "Fontenot, Nathan" <Nathan.Fontenot@amd.com>,
        "Deucher, Alexander" <Alexander.Deucher@amd.com>,
        "Huang, Shimmer" <Shimmer.Huang@amd.com>,
        "Du, Xiaojian" <Xiaojian.Du@amd.com>,
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        "Karny, Wyes" <Wyes.Karny@amd.com>,
        "linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v8 08/13] cpufreq: amd-pstate: implement suspend and
 resume callbacks
Message-ID: <Y6Vi3f/1z7QZKGCI@amd.com>
References: <20221219064042.661122-1-perry.yuan@amd.com>
 <20221219064042.661122-9-perry.yuan@amd.com>
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On Mon, Dec 19, 2022 at 02:40:37PM +0800, Yuan, Perry wrote:
> From: Perry Yuan <Perry.Yuan@amd.com>
> 
> add suspend and resume support for the AMD processors by amd_pstate_epp
> driver instance.
> 
> When the CPPC is suspended, EPP driver will set EPP profile to 'power'
> profile and set max/min perf to lowest perf value.
> When resume happens, it will restore the MSR registers with
> previous cached value.
> 
> Reviewed-by: Mario Limonciello <Mario.Limonciello@amd.com>
> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>

Acked-by: Huang Rui <ray.huang@amd.com>

> ---
>  drivers/cpufreq/amd-pstate.c | 41 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 41 insertions(+)
> 
> diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
> index cb647f55a169..fc12d35bc7bd 100644
> --- a/drivers/cpufreq/amd-pstate.c
> +++ b/drivers/cpufreq/amd-pstate.c
> @@ -1107,6 +1107,45 @@ static int amd_pstate_epp_verify_policy(struct cpufreq_policy_data *policy)
>  	return 0;
>  }
>  
> +static int amd_pstate_epp_suspend(struct cpufreq_policy *policy)
> +{
> +        struct amd_cpudata *cpudata = all_cpu_data[policy->cpu];
> +        int ret;
> +
> +        /* avoid suspending when EPP is not enabled */
> +        if (cppc_state != AMD_PSTATE_ACTIVE)
> +                return 0;
> +
> +        /* set this flag to avoid setting core offline*/
> +        cpudata->suspended = true;
> +
> +        /* disable CPPC in lowlevel firmware */
> +        ret = amd_pstate_enable(false);
> +        if (ret)
> +                pr_err("failed to suspend, return %d\n", ret);
> +
> +        return 0;
> +}
> +
> +static int amd_pstate_epp_resume(struct cpufreq_policy *policy)
> +{
> +        struct amd_cpudata *cpudata = all_cpu_data[policy->cpu];
> +
> +        if (cpudata->suspended) {
> +                mutex_lock(&amd_pstate_limits_lock);
> +
> +                /* enable amd pstate from suspend state*/
> +                amd_pstate_epp_reenable(cpudata);
> +
> +                mutex_unlock(&amd_pstate_limits_lock);
> +
> +                cpudata->suspended = false;
> +        }
> +
> +        return 0;
> +}
> +
> +
>  static struct cpufreq_driver amd_pstate_driver = {
>  	.flags		= CPUFREQ_CONST_LOOPS | CPUFREQ_NEED_UPDATE_LIMITS,
>  	.verify		= amd_pstate_verify,
> @@ -1129,6 +1168,8 @@ static struct cpufreq_driver amd_pstate_epp_driver = {
>  	.update_limits	= amd_pstate_epp_update_limits,
>  	.offline	= amd_pstate_epp_cpu_offline,
>  	.online		= amd_pstate_epp_cpu_online,
> +	.suspend	= amd_pstate_epp_suspend,
> +	.resume		= amd_pstate_epp_resume,
>  	.name		= "amd_pstate_epp",
>  	.attr		= amd_pstate_epp_attr,
>  };
> -- 
> 2.34.1
>