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Message-ID: <09fd48bd-7f92-b0e0-cb2a-ab2fb6ece868@linaro.org>
Date:   Fri, 23 Dec 2022 10:13:21 +0100
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Subject: Re: [PATCH 4/7] arm64: dts: qcom: sc7280: audioreach: Update lpasscc
 reg property
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To:     Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>,
        agross@kernel.org, andersson@kernel.org, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        quic_rohkumar@quicinc.com, srinivas.kandagatla@linaro.org,
        dianders@chromium.org, swboyd@chromium.org, judyhsiao@chromium.org,
        konrad.dybcio@linaro.org
References: <1671702170-24781-1-git-send-email-quic_srivasam@quicinc.com>
 <1671702170-24781-5-git-send-email-quic_srivasam@quicinc.com>
From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
In-Reply-To: <1671702170-24781-5-git-send-email-quic_srivasam@quicinc.com>
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On 22/12/2022 10:42, Srinivasa Rao Mandadapu wrote:
> Update lpasscc register mapping for avoiding memory regions conflict with
> ADSP pil node.
> 
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
> Tested-by: Mohammad Rafi Shaik <quic_mohs@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
> index 0ce8755..a750f05 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
> @@ -111,6 +111,14 @@
>  	};
>  };
>  
> +&lpasscc {
> +	reg = <0 0x03c04000 0 0x4>,
> +		<0 0x032a9000 0 0x1000>;

Misaligned.

> +	reg-names = "top_cc", "reset-cgcr";

I have doubts this was tested... git grep shows 0 answers.

> +	#reset-cells = <1>;

Why all these are not part of SoC DTSI?

> +	status = "okay";

Why?

> +};
> +
>  &soc {
>  	qcom,lpass@3000000 {
>  		compatible = "qcom,sc7280-adsp-pil";

Best regards,
Krzysztof