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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Richard Cochran , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, macpaul.lin@mediatek.com Subject: Re: [PATCH v5 1/2] stmmac: dwmac-mediatek: enable 2ns delay only for special cases Message-ID: References: <20221223015029.24978-1-biao.huang@mediatek.com> <20221223015029.24978-2-biao.huang@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221223015029.24978-2-biao.huang@mediatek.com> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Dec 23, 2022 at 09:50:28AM +0800, Biao Huang wrote: > In current driver, MAC will always enable 2ns delay in RGMII mode, > but that will lead to transmission failures for "rgmii-id"/"rgmii-txid" > cases. > > Modify the implementation of fix_mac_speed() to ensure the 2ns delay > will only take effect for "rgmii-rxid"/"rgmii" cases, then user can > choose phy-mode freely. This does not seem correct. There are three ways the delays can be added: 1) The MAC 2) The PHY 3) Extra long lines on the board. What the four RGMII modes tell you is what is needed in addition to whatever the board provides. So it describes the combination of 1) and 2). Your board does not appear to be applying any delays, so you should be using rgmii-id. The MAC and PHY driver then need to decide how to add these delays, and in most cases, the MAC does nothing, and passes phy-mode to the PHY and the PHY adds the delay. The MAC can add delays, but if it does, it need to mask out the delays it added to the value passed to the PHY. Otherwise the PHY will add the delay as well. > > - if ((phy_interface_mode_is_rgmii(priv_plat->phy_mode))) { > + switch (priv_plat->phy_mode) { > + case PHY_INTERFACE_MODE_RGMII: > + case PHY_INTERFACE_MODE_RGMII_RXID: > /* prefer 2ns fixed delay which is controlled by TXC_PHASE_CTRL, > * when link speed is 1Gbps with RGMII interface, > * Fall back to delay macro circuit for 10/100Mbps link speed. So this is wrong. PHY_INTERFACE_MODE_RGMII means the board is adding the delay via long lines. You should not be added any delay at all. For PHY_INTERFACE_MODE_RGMII_RXID, you need to mask the RXID bit from phy_mode when connecting the MAC to the PHY. Otherwise the PHY is going to add this delay as well. Andrew