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Date:   Sat, 24 Dec 2022 10:13:52 +0300
From:   Dan Carpenter <error27@gmail.com>
To:     oe-kbuild@lists.linux.dev,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>, mturquette@baylibre.com
Cc:     lkp@intel.com, oe-kbuild-all@lists.linux.dev, sboyd@kernel.org,
        matthias.bgg@gmail.com, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org,
        angelogioacchino.delregno@collabora.com, wenst@chromium.org,
        johnson.wang@mediatek.com, miles.chen@mediatek.com,
        fparent@baylibre.com, chun-jie.chen@mediatek.com,
        sam.shih@mediatek.com, y.oudjana@protonmail.com,
        nfraprado@collabora.com, rex-bc.chen@mediatek.com,
        ryder.lee@kernel.org, daniel@makrotopia.org,
        jose.exposito89@gmail.com, yangyingliang@huawei.com,
        pablo.sun@mediatek.com, msp@baylibre.com, weiyi.lu@mediatek.com,
        ikjn@chromium.org, linux-kernel@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org,
        kernel@collabora.com
Subject: Re: [PATCH v2 10/23] clk: mediatek: mt8173: Break down clock drivers
 and allow module build
Message-ID: <202212240437.1D3FXJyP-lkp@intel.com>
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In-Reply-To: <20221223094259.87373-11-angelogioacchino.delregno@collabora.com>
Precedence: bulk

Hi AngeloGioacchino,

https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/AngeloGioacchino-Del-Regno/clk-mediatek-mt8192-Correctly-unregister-and-free-clocks-on-failure/20221223-174705
base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
patch link:    https://lore.kernel.org/r/20221223094259.87373-11-angelogioacchino.delregno%40collabora.com
patch subject: [PATCH v2 10/23] clk: mediatek: mt8173: Break down clock drivers and allow module build
config: parisc-randconfig-m031-20221219
compiler: hppa-linux-gcc (GCC) 12.1.0

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
| Reported-by: Dan Carpenter <error27@gmail.com>

smatch warnings:
drivers/clk/mediatek/clk-mt8173-apmixedsys.c:95 clk_mt8173_apmixed_probe() warn: passing zero to 'PTR_ERR'

vim +/PTR_ERR +95 drivers/clk/mediatek/clk-mt8173-apmixedsys.c

c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23   85  static int clk_mt8173_apmixed_probe(struct platform_device *pdev)
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23   86  {
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23   87  	struct device_node *node = pdev->dev.of_node;
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23   88  	struct clk_hw_onecell_data *clk_data;
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23   89  	void __iomem *base;
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23   90  	struct clk_hw *hw;
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23   91  	int r;
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23   92  
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23   93  	base = of_iomap(node, 0);
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23   94  	if (!base)
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  @95  		return PTR_ERR(base);

return -ENOMEM?

c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23   96  
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23   97  	clk_data = mtk_alloc_clk_data(CLK_APMIXED_NR_CLK);
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23   98  	if (IS_ERR_OR_NULL(clk_data))
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23   99  		return -ENOMEM;
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  100  
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  101  	r = mtk_clk_register_plls(node, plls, ARRAY_SIZE(plls), clk_data);
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  102  	if (r)
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  103  		goto free_clk_data;
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  104  
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  105  	hw = mtk_clk_register_ref2usb_tx("ref2usb_tx", "clk26m", base + REGOFF_REF2USB);
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  106  	if (IS_ERR(hw)) {
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  107  		r = PTR_ERR(hw);
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  108  		dev_err(&pdev->dev, "Failed to register ref2usb_tx: %d\n", r);
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  109  		goto unregister_plls;
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  110  	}
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  111  	clk_data->hws[CLK_APMIXED_REF2USB_TX] = hw;
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  112  
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  113  	hw = devm_clk_hw_register_divider(&pdev->dev, "hdmi_ref", "tvdpll_594m", 0,
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  114  					  base + REGOFF_HDMI_REF, 16, 3,
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  115  					  CLK_DIVIDER_POWER_OF_TWO, NULL);
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  116  	clk_data->hws[CLK_APMIXED_HDMI_REF] = hw;
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  117  
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  118  	r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  119  	if (r)
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  120  		goto unregister_ref2usb;
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  121  
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  122  	return 0;
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  123  
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  124  unregister_ref2usb:
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  125  	mtk_clk_unregister_ref2usb_tx(clk_data->hws[CLK_APMIXED_REF2USB_TX]);
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  126  unregister_plls:
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  127  	mtk_clk_unregister_plls(plls, ARRAY_SIZE(plls), clk_data);
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  128  free_clk_data:
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  129  	mtk_free_clk_data(clk_data);
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  130  	return r;
c10b45573221c8 AngeloGioacchino Del Regno 2022-12-23  131  }

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