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Tue, 27 Dec 2022 20:36:04 -0500 (EST) Message-ID: <8f82ddb6-cd3a-c7f7-5a20-427403d8600c@sholland.org> Date: Tue, 27 Dec 2022 19:36:03 -0600 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux ppc64le; rv:102.0) Gecko/20100101 Thunderbird/102.3.3 Subject: Re: [PATCH v3] riscv: Use PUD/P4D/PGD pages for the linear mapping Content-Language: en-US To: Conor Dooley , Alexandre Ghiti Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Guo Ren , Rob Herring , Frank Rowand , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org References: <20221213060204.27286-1-alexghiti@rivosinc.com> From: Samuel Holland In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-4.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 12/22/22 17:21, Conor Dooley wrote: > On Tue, Dec 13, 2022 at 07:02:04AM +0100, Alexandre Ghiti wrote: >> During the early page table creation, we used to set the mapping for >> PAGE_OFFSET to the kernel load address: but the kernel load address is >> always offseted by PMD_SIZE which makes it impossible to use PUD/P4D/PGD >> pages as this physical address is not aligned on PUD/P4D/PGD size (whereas >> PAGE_OFFSET is). >> >> But actually we don't have to establish this mapping (ie set va_pa_offset) >> that early in the boot process because: >> >> - first, setup_vm installs a temporary kernel mapping and among other >> things, discovers the system memory, >> - then, setup_vm_final creates the final kernel mapping and takes >> advantage of the discovered system memory to create the linear >> mapping. >> >> During the first phase, we don't know the start of the system memory and >> then until the second phase is finished, we can't use the linear mapping at >> all and phys_to_virt/virt_to_phys translations must not be used because it >> would result in a different translation from the 'real' one once the final >> mapping is installed. >> >> So here we simply delay the initialization of va_pa_offset to after the >> system memory discovery. But to make sure noone uses the linear mapping >> before, we add some guard in the DEBUG_VIRTUAL config. >> >> Finally we can use PUD/P4D/PGD hugepages when possible, which will result >> in a better TLB utilization. >> >> Note that we rely on the firmware to protect itself using PMP. >> >> Signed-off-by: Alexandre Ghiti >> --- >> >> v3: >> - Change the comment about initrd_start VA conversion so that it fits >> ARM64 and RISCV64 (and others in the future if needed), as suggested >> by Rob >> >> v2: >> - Add a comment on why RISCV64 does not need to set initrd_start/end that >> early in the boot process, as asked by Rob >> >> Note that this patch is rebased on top of: >> [PATCH v1 1/1] riscv: mm: call best_map_size many times during linear-mapping > > Hey Alex, unfortunately I could not get this to apply either (I tried a > riscv/for-next & Linus' tree). > The above patch should be in both, so idk: > git am -3 v3_20221213_alexghiti_riscv_use_pud_p4d_pgd_pages_for_the_linear_mapping.mbx > Applying: riscv: Use PUD/P4D/PGD pages for the linear mapping > error: sha1 information is lacking or useless (arch/riscv/mm/init.c). > error: could not build fake ancestor > Patch failed at 0001 riscv: Use PUD/P4D/PGD pages for the linear mapping That's because my CONFIG_DEBUG_VIRTUAL fix got applied first. This patch applies cleanly after: git revert -m1 61b2f0bdaa3c7e6956fdac0a7c1e8284b9b81d1d though you'll get one trivial conflict if you try to undo the revert. Regards, Samuel