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From:   Miles Chen <miles.chen@mediatek.com>
To:     <angelogioacchino.delregno@collabora.com>
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Subject: Re: [PATCH v2 14/23] clk: mediatek: clk-mt8192: Move CLK_TOP_CSW_F26M_D2 in top_divs
Date:   Wed, 28 Dec 2022 15:58:26 +0800
Message-ID: <20221228075826.27396-1-miles.chen@mediatek.com>
In-Reply-To: <20221223094259.87373-15-angelogioacchino.delregno@collabora.com>
References: <20221223094259.87373-15-angelogioacchino.delregno@collabora.com>
MIME-Version: 1.0
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> This driver is registered early in clk_mt8192_top_init_early() and
> then again in clk_mt8192_top_probe(): the difference between the
> two is that the early one is probed with CLK_OF_DECLARE_DRIVER and
> the latter is regularly probed as a platform_driver.
> 
> Knowing that it is not necessary for this platform to register the
> TOP_CSW_F26M_D2 clock that early, move it to top_divs and register
> it with the others during platform_driver probe for topckgen;
> 
> While at it, since the only reason why the early probe existed was
> to register that clock, remove that entirely - leaving this driver
> to use only platform_driver.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>

Thanks and this patch makes it easier to convert clk-mt8192 driver to a kernel module.

Reviewed-by: Miles Chen <miles.chen@mediatek.com>