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Date:   Wed, 28 Dec 2022 22:49:52 +0000
From:   Conor Dooley <conor@kernel.org>
To:     Hal Feng <hal.feng@starfivetech.com>
Cc:     linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Ben Dooks <ben.dooks@sifive.com>,
        Daniel Lezcano <daniel.lezcano@linaro.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Marc Zyngier <maz@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Linus Walleij <linus.walleij@linaro.org>,
        Emil Renner Berthing <emil.renner.berthing@canonical.com>,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 7/7] riscv: dts: starfive: Add StarFive JH7110
 VisionFive 2 board device tree
Message-ID: <Y6zIEMZJUW6CsPNS@spud>
References: <20221220011247.35560-1-hal.feng@starfivetech.com>
 <20221220011247.35560-8-hal.feng@starfivetech.com>
 <Y6Iob3csmKMl0rB/@spud>
 <94c90f3f-0ca7-7cfb-4d4f-8f90e3300e16@starfivetech.com>
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On Fri, Dec 23, 2022 at 11:12:34AM +0800, Hal Feng wrote:
> On Tue, 20 Dec 2022 21:26:07 +0000, Conor Dooley wrote:
> > On Tue, Dec 20, 2022 at 09:12:47AM +0800, Hal Feng wrote:
> > > From: Emil Renner Berthing <kernel@esmil.dk>
> > >=20
> > > Add a minimal device tree for StarFive JH7110 VisionFive 2 board
> > > which has version A and version B. Support booting and basic
> > > clock/reset/pinctrl/uart drivers.
> > >=20
> > > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> > > Co-developed-by: Jianlong Huang <jianlong.huang@starfivetech.com>
> > > Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
> > > Co-developed-by: Hal Feng <hal.feng@starfivetech.com>
> > > Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> > > ---

> > > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-=
2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> > > new file mode 100644
> > > index 000000000000..c60280b89c73
> > > --- /dev/null
> > > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> > > @@ -0,0 +1,111 @@
> > > +// SPDX-License-Identifier: GPL-2.0 OR MIT
> > > +/*
> > > + * Copyright (C) 2022 StarFive Technology Co., Ltd.
> > > + * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
> > > + */
> > > +
> > > +/dts-v1/;
> > > +#include "jh7110.dtsi"
> > > +#include "jh7110-pinfunc.h"
> > > +#include <dt-bindings/gpio/gpio.h>
> > > +
> > > +/ {
> > > +	aliases {
> > > +		serial0 =3D &uart0;
> > > +	};
> > > +
> > > +	chosen {
> > > +		stdout-path =3D "serial0:115200n8";
> > > +	};
> > > +
> > > +	cpus {
> > > +		timebase-frequency =3D <4000000>;
> > > +	};
> > > +
> > > +	memory@40000000 {
> > > +		device_type =3D "memory";
> > > +		reg =3D <0x0 0x40000000 0x1 0x0>;
> >=20
> > Is this a good idea when you have SKUs with 2, 4 & 8 GiB of DDR?
>=20
> The VisionFive 2 board only has 4GB version and 8GB version now. Before
> linux startup, we will change this property in dtb through u-boot to
> make sure the board can boot up with the correct memory size.

Ah I see. Thanks.


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