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Fri, 30 Dec 2022 14:13:11 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Fri, 30 Dec 2022 14:13:09 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Fri, 30 Dec 2022 14:13:09 +0800 From: Miles Chen To: CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v2 00/23] MediaTek clocks cleanups and improvements Date: Fri, 30 Dec 2022 14:13:09 +0800 Message-ID: <20221230061309.16643-1-miles.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221223094259.87373-1-angelogioacchino.delregno@collabora.com> References: <20221223094259.87373-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > Changes in v2: > - Moved dt-bindings CLK_DUMMY to clk-mtk.h instead > > > This series performs cleanups and improvements on MediaTek clock > drivers, greatly reducing code duplication (hence also reducing > kernel size). > > There would be a lot to say about it, but summarizing: > > * Propagates struct device where possible in order to introduce the > possibility of using Runtime PM on clock drivers as needed, > possibly enhancing reliability of some platforms (obviously, this > will do nothing unless power-domains are added to devicetree); > > * Cleans up some duplicated clock(s) registration attempt(s): on > some platforms the 26M fixed factor clock is registered early, > but then upon platform_driver probe, an attempt to re-register > that clock was performed; > > * Removes some early clock registration where possible, moving > everything to platform_driver clock probe; > > * Breaks down the big MT8173 clock driver in multiple ones, as it's > already done with the others, cleans it up and adds possibility > possibility to compile non-boot-critical clock drivers (for 8173) > as modules; > > * Extends the common mtk_clk_simple_probe() function to be able to > register multiple MediaTek clock types; > > * Removes duplicated [...]_probe functions from multiple MediaTek SoC > clock drivers, migrating almost everything to the common functions > mtk_clk_simple_probe(); > > * Adds a .remove() callback, pointing to the common mtk_clk_simple_remove() > function to all clock drivers that were migrated to the common probe; > > * Some more spare cleanups here and there. > > All of this was manually tested on various Chromebooks (with different MTK > SoCs) and no regression was detected. > > Cheers! I tested this v2 series on mt6779 and mt8192 without any problem. thanks, Miles