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Thu, 29 Dec 2022 23:14:40 -0800 (PST) MIME-Version: 1.0 References: <20221223094259.87373-1-angelogioacchino.delregno@collabora.com> <20221223094259.87373-13-angelogioacchino.delregno@collabora.com> In-Reply-To: <20221223094259.87373-13-angelogioacchino.delregno@collabora.com> From: Chen-Yu Tsai Date: Fri, 30 Dec 2022 15:14:29 +0800 Message-ID: Subject: Re: [PATCH v2 12/23] clk: mediatek: clk-mtk: Extend mtk_clk_simple_probe() To: AngeloGioacchino Del Regno Cc: mturquette@baylibre.com, sboyd@kernel.org, matthias.bgg@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, johnson.wang@mediatek.com, miles.chen@mediatek.com, fparent@baylibre.com, chun-jie.chen@mediatek.com, sam.shih@mediatek.com, y.oudjana@protonmail.com, nfraprado@collabora.com, rex-bc.chen@mediatek.com, ryder.lee@kernel.org, daniel@makrotopia.org, jose.exposito89@gmail.com, yangyingliang@huawei.com, pablo.sun@mediatek.com, msp@baylibre.com, weiyi.lu@mediatek.com, ikjn@chromium.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, kernel@collabora.com Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Dec 23, 2022 at 5:43 PM AngeloGioacchino Del Regno wrote: > > As a preparation to increase probe functions commonization across > various MediaTek SoC clock controller drivers, extend function > mtk_clk_simple_probe() to be able to register not only gates, but > also fixed clocks, factors, muxes and composites. > > Signed-off-by: AngeloGioacchino Del Regno > --- > drivers/clk/mediatek/clk-mtk.c | 101 ++++++++++++++++++++++++++++++--- > drivers/clk/mediatek/clk-mtk.h | 10 ++++ > 2 files changed, 103 insertions(+), 8 deletions(-) > > diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c > index d05364e17e95..b0a6225cd7b2 100644 > --- a/drivers/clk/mediatek/clk-mtk.c > +++ b/drivers/clk/mediatek/clk-mtk.c > @@ -11,12 +11,14 @@ > #include > #include > #include > +#include > #include > #include > #include > > #include "clk-mtk.h" > #include "clk-gate.h" > +#include "clk-mux.h" > > const struct mtk_gate_regs cg_regs_dummy = { 0, 0, 0 }; > > @@ -465,20 +467,71 @@ int mtk_clk_simple_probe(struct platform_device *pdev) > const struct mtk_clk_desc *mcd; > struct clk_hw_onecell_data *clk_data; > struct device_node *node = pdev->dev.of_node; > - int r; > + void __iomem *base; > + int num_clks, r; > > mcd = of_device_get_match_data(&pdev->dev); > if (!mcd) > return -EINVAL; > > - clk_data = mtk_alloc_clk_data(mcd->num_clks); > + /* Composite clocks needs us to pass iomem pointer */ > + if (mcd->composite_clks) { > + if (!mcd->shared_io) > + base = devm_platform_ioremap_resource(pdev, 0); > + else > + base = of_iomap(node, 0); > + > + if (IS_ERR_OR_NULL(base)) > + return IS_ERR(base) ? PTR_ERR(base) : -ENOMEM; > + } > + > + /* Calculate how many clk_hw_onecell_data entries to allocate */ > + num_clks = mcd->num_clks + mcd->num_composite_clks; > + num_clks += mcd->num_fixed_clks + mcd->num_factor_clks; > + num_clks += mcd->num_mux_clks; > + > + clk_data = mtk_alloc_clk_data(num_clks); > if (!clk_data) > return -ENOMEM; > > - r = mtk_clk_register_gates(node, mcd->clks, mcd->num_clks, > - clk_data, &pdev->dev); > - if (r) > - goto free_data; > + if (mcd->fixed_clks) { > + r = mtk_clk_register_fixed_clks(mcd->fixed_clks, > + mcd->num_fixed_clks, clk_data); > + if (r) > + goto free_data; > + } > + > + if (mcd->factor_clks) { > + r = mtk_clk_register_factors(mcd->factor_clks, > + mcd->num_factor_clks, clk_data); > + if (r) > + goto unregister_fixed_clks; > + } > + > + if (mcd->mux_clks) { > + r = mtk_clk_register_muxes(mcd->mux_clks, mcd->num_mux_clks, > + node, mcd->clk_lock, clk_data, > + &pdev->dev); > + if (r) > + goto unregister_factors; > + }; > + > + if (mcd->composite_clks) { > + /* We don't check composite_lock because it's optional */ > + r = mtk_clk_register_composites(mcd->composite_clks, > + mcd->num_composite_clks, > + base, mcd->clk_lock, > + clk_data, &pdev->dev); > + if (r) > + goto unregister_muxes; > + } > + > + if (mcd->clks) { > + r = mtk_clk_register_gates(node, mcd->clks, mcd->num_clks, > + clk_data, &pdev->dev); > + if (r) > + goto unregister_composites; > + } > > r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); > if (r) > @@ -496,9 +549,28 @@ int mtk_clk_simple_probe(struct platform_device *pdev) > return r; > > unregister_clks: > - mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data); > + if (mcd->clks) > + mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data); > +unregister_composites: > + if (mcd->composite_clks) > + mtk_clk_unregister_composites(mcd->composite_clks, > + mcd->num_composite_clks, clk_data); > +unregister_muxes: > + if (mcd->mux_clks) > + mtk_clk_unregister_muxes(mcd->mux_clks, > + mcd->num_mux_clks, clk_data); > +unregister_factors: > + if (mcd->factor_clks) > + mtk_clk_unregister_factors(mcd->factor_clks, > + mcd->num_factor_clks, clk_data); > +unregister_fixed_clks: > + if (mcd->fixed_clks) > + mtk_clk_unregister_fixed_clks(mcd->fixed_clks, > + mcd->num_fixed_clks, clk_data); > free_data: > mtk_free_clk_data(clk_data); > + if (mcd->shared_io && base) > + iounmap(base); > return r; > } > EXPORT_SYMBOL_GPL(mtk_clk_simple_probe); > @@ -510,7 +582,20 @@ int mtk_clk_simple_remove(struct platform_device *pdev) > struct device_node *node = pdev->dev.of_node; > > of_clk_del_provider(node); > - mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data); > + if (mcd->clks) > + mtk_clk_unregister_gates(mcd->clks, mcd->num_clks, clk_data); > + if (mcd->composite_clks) > + mtk_clk_unregister_composites(mcd->composite_clks, > + mcd->num_composite_clks, clk_data); > + if (mcd->mux_clks) > + mtk_clk_unregister_muxes(mcd->mux_clks, > + mcd->num_mux_clks, clk_data); > + if (mcd->factor_clks) > + mtk_clk_unregister_factors(mcd->factor_clks, > + mcd->num_factor_clks, clk_data); > + if (mcd->fixed_clks) > + mtk_clk_unregister_fixed_clks(mcd->fixed_clks, > + mcd->num_fixed_clks, clk_data); > mtk_free_clk_data(clk_data); > > return 0; > diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h > index dd43235285db..1d036ba6ca07 100644 > --- a/drivers/clk/mediatek/clk-mtk.h > +++ b/drivers/clk/mediatek/clk-mtk.h > @@ -220,7 +220,17 @@ void mtk_clk_unregister_ref2usb_tx(struct clk_hw *hw); > struct mtk_clk_desc { > const struct mtk_gate *clks; > size_t num_clks; I would've suggested renaming this to "gates" as well, but that seems likely to cause additional unnecessary churn. Maybe you could leave a comment in the header about this "historical reason"? > + const struct mtk_composite *composite_clks; > + size_t num_composite_clks; > + const struct mtk_fixed_clk *fixed_clks; > + size_t num_fixed_clks; > + const struct mtk_fixed_factor *factor_clks; > + size_t num_factor_clks; > + const struct mtk_mux *mux_clks; > + size_t num_mux_clks; Nit: I would order these based on the order they are used/registered. Otherwise, Reviewed-by: Chen-Yu Tsai > const struct mtk_clk_rst_desc *rst_desc; > + spinlock_t *clk_lock; > + bool shared_io; > }; > > int mtk_clk_simple_probe(struct platform_device *pdev); > -- > 2.39.0 >