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Date:   Mon, 2 Jan 2023 19:48:03 +0100
From:   Sam Ravnborg <sam@ravnborg.org>
To:     Javier Martinez Canillas <javierm@redhat.com>
Cc:     linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
        Thierry Reding <thierry.reding@gmail.com>
Subject: Re: [PATCH 09/14] drm/panel-samsung-s6e88a0-ams452ef01: Drop custom
 DSI write macro
Message-ID: <Y7Mm46iJnwJC2Dqr@ravnborg.org>
References: <20221228014757.3170486-1-javierm@redhat.com>
 <20221228014757.3170486-10-javierm@redhat.com>
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On Wed, Dec 28, 2022 at 02:47:52AM +0100, Javier Martinez Canillas wrote:
> There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
> that instead and delete the custom DSI write macro defined in the driver.
> 
> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
> ---
> 
>  .../panel/panel-samsung-s6e88a0-ams452ef01.c  | 24 +++++++------------
>  1 file changed, 8 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c
> index 97ff7a18545c..e94d88fed4f3 100644
> --- a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c
> +++ b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c
> @@ -28,14 +28,6 @@ s6e88a0_ams452ef01 *to_s6e88a0_ams452ef01(struct drm_panel *panel)
>  	return container_of(panel, struct s6e88a0_ams452ef01, panel);
>  }
>  
> -#define dsi_dcs_write_seq(dsi, seq...) do {				\
> -		static const u8 d[] = { seq };				\
> -		int ret;						\
> -		ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d));	\
> -		if (ret < 0)						\
> -			return ret;					\
> -	} while (0)
> -
>  static void s6e88a0_ams452ef01_reset(struct s6e88a0_ams452ef01 *ctx)
>  {
>  	gpiod_set_value_cansleep(ctx->reset_gpio, 1);
> @@ -54,8 +46,8 @@ static int s6e88a0_ams452ef01_on(struct s6e88a0_ams452ef01 *ctx)
>  
>  	dsi->mode_flags |= MIPI_DSI_MODE_LPM;
>  
> -	dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); // enable LEVEL2 commands
> -	dsi_dcs_write_seq(dsi, 0xcc, 0x4c); // set Pixel Clock Divider polarity
> +	mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); // enable LEVEL2 commands
> +	mipi_dsi_dcs_write_seq(dsi, 0xcc, 0x4c); // set Pixel Clock Divider polarity
>  
>  	ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
>  	if (ret < 0) {
> @@ -65,7 +57,7 @@ static int s6e88a0_ams452ef01_on(struct s6e88a0_ams452ef01 *ctx)
>  	msleep(120);
>  
>  	// set default brightness/gama
> -	dsi_dcs_write_seq(dsi, 0xca,
> +	mipi_dsi_dcs_write_seq(dsi, 0xca,
>  			  0x01, 0x00, 0x01, 0x00, 0x01, 0x00,	// V255 RR,GG,BB
>  			  0x80, 0x80, 0x80,			// V203 R,G,B
>  			  0x80, 0x80, 0x80,			// V151 R,G,B
> @@ -77,11 +69,11 @@ static int s6e88a0_ams452ef01_on(struct s6e88a0_ams452ef01 *ctx)
>  			  0x6b, 0x68, 0x71,			// V3   R,G,B
>  			  0x00, 0x00, 0x00);			// V1   R,G,B
Fix indent - with this fixed:
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>

>  	// set default Amoled Off Ratio
> -	dsi_dcs_write_seq(dsi, 0xb2, 0x40, 0x0a, 0x17, 0x00, 0x0a);
> -	dsi_dcs_write_seq(dsi, 0xb6, 0x2c, 0x0b); // set default elvss voltage
> -	dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
> -	dsi_dcs_write_seq(dsi, 0xf7, 0x03); // gamma/aor update
> -	dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); // disable LEVEL2 commands
> +	mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x40, 0x0a, 0x17, 0x00, 0x0a);
> +	mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x2c, 0x0b); // set default elvss voltage
> +	mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
> +	mipi_dsi_dcs_write_seq(dsi, 0xf7, 0x03); // gamma/aor update
> +	mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); // disable LEVEL2 commands
>  
>  	ret = mipi_dsi_dcs_set_display_on(dsi);
>  	if (ret < 0) {
> -- 
> 2.38.1