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[2620:137:e000::1:20]) by mx.google.com with ESMTP id e184-20020a6369c1000000b0049e0bab8d55si14649954pgc.133.2023.01.03.01.54.10; Tue, 03 Jan 2023 01:54:18 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=KQpIZTVt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237193AbjACJoj (ORCPT + 61 others); Tue, 3 Jan 2023 04:44:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59856 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230467AbjACJoh (ORCPT ); Tue, 3 Jan 2023 04:44:37 -0500 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F245E0BF; Tue, 3 Jan 2023 01:44:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1672739076; x=1704275076; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=+9HSyXIfC2I08HI//cI4Btf5r0ymTiYkUmBIZ6t0YSE=; b=KQpIZTVtT/AvNTe3vSJV6acEHiG+yxgtIcR3Vc0a6UpBaWX2bcg9AS7V 9IFR+jhBMTq7Vuv1u/5qCO7y+EqA/W6o+svJ3CjILEBb2egKP5QmcKQGS zMrEsEuMD1lcosyAc2c2DTlNMQW4Pxrs0d6uoLEuhcIVLk3qCqpPO5xFI phsXx+gpH2YooMmp1jisWjL2vglDo40xE9u6zsr/KPNwIfPKba2KUELVN 0/8/LeauoUmPYEF2e6bfgCaLnabBLncJDYhPyLII9ZjU20ZnrL8MD3syb 3bNn111OvMA5zpIHdG0DPH43W0DINAJWeKra14qXNpWsivslzyanefQb8 A==; X-IronPort-AV: E=McAfee;i="6500,9779,10578"; a="321694106" X-IronPort-AV: E=Sophos;i="5.96,296,1665471600"; d="scan'208";a="321694106" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Jan 2023 01:44:36 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10578"; a="900119069" X-IronPort-AV: E=Sophos;i="5.96,296,1665471600"; d="scan'208";a="900119069" Received: from yilunxu-optiplex-7050.sh.intel.com (HELO localhost) ([10.239.159.165]) by fmsmga006.fm.intel.com with ESMTP; 03 Jan 2023 01:44:33 -0800 Date: Tue, 3 Jan 2023 17:34:22 +0800 From: Xu Yilun To: Ilpo =?iso-8859-1?Q?J=E4rvinen?= Cc: linux-fpga@vger.kernel.org, Wu Hao , Tom Rix , Moritz Fischer , Lee Jones , Matthew Gerlach , Russ Weight , Tianfei zhang , Mark Brown , Marco Pagani , LKML Subject: Re: [PATCH v5 08/10] fpga: m10bmc-sec: Differentiate rsu status from doorbell in csr map Message-ID: References: <20221226175849.13056-1-ilpo.jarvinen@linux.intel.com> <20221226175849.13056-9-ilpo.jarvinen@linux.intel.com> <6d9ccd20-2c13-e352-c9e9-804ea3dadf@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <6d9ccd20-2c13-e352-c9e9-804ea3dadf@linux.intel.com> X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2022-12-30 at 12:23:18 +0200, Ilpo J?rvinen wrote: > On Fri, 30 Dec 2022, Xu Yilun wrote: > > > On 2022-12-26 at 19:58:47 +0200, Ilpo J?rvinen wrote: > > > The rsu_status field moves from the doorbell register to the auth > > > result register in the PMCI implementation of the MAX10 BMC. Refactor > > > the sec update driver code to handle two distinct registers (rsu_status > > > field was added into csr map already when it was introduced but it was > > > unused until now). > > > > > > Co-developed-by: Tianfei zhang > > > Signed-off-by: Tianfei zhang > > > Co-developed-by: Russ Weight > > > Signed-off-by: Russ Weight > > > Signed-off-by: Ilpo J?rvinen > > > --- > > > drivers/fpga/intel-m10-bmc-sec-update.c | 68 ++++++++++++++++--------- > > > include/linux/mfd/intel-m10-bmc.h | 2 +- > > > 2 files changed, 46 insertions(+), 24 deletions(-) > > > > > > diff --git a/drivers/fpga/intel-m10-bmc-sec-update.c b/drivers/fpga/intel-m10-bmc-sec-update.c > > > index 6e58a463619c..1fe8b7ff594c 100644 > > > --- a/drivers/fpga/intel-m10-bmc-sec-update.c > > > +++ b/drivers/fpga/intel-m10-bmc-sec-update.c > > > @@ -251,7 +251,7 @@ static void log_error_regs(struct m10bmc_sec *sec, u32 doorbell) > > > const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; > > > u32 auth_result; > > > > > > - dev_err(sec->dev, "RSU error status: 0x%08x\n", doorbell); > > > + dev_err(sec->dev, "Doorbell: 0x%08x\n", doorbell); > > > > > > if (!m10bmc_sys_read(sec->m10bmc, csr_map->auth_result, &auth_result)) > > > dev_err(sec->dev, "RSU auth result: 0x%08x\n", auth_result); > > > @@ -279,6 +279,30 @@ static bool rsu_progress_busy(u32 progress) > > > progress == RSU_PROG_PROGRAM_KEY_HASH); > > > } > > > > > > +static int m10bmc_sec_progress_status(struct m10bmc_sec *sec, u32 *doorbell, > > > > Please try to rename the parameters, to indicate u32 *doorbell is the > > raw value from doorbell register, and u32 *progress & status are > > software managed info. > > I'll try to do that. > > > > + u32 *progress, u32 *status) > > > +{ > > > + const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; > > > + u32 status_reg; > > > + int ret; > > > + > > > + ret = m10bmc_sys_read(sec->m10bmc, csr_map->doorbell, doorbell); > > > + if (ret) > > > + return ret; > > > + > > > + if (csr_map->doorbell != csr_map->rsu_status) { > > > > I prefer not to complicate the csr map filling in intel-m10-bmc, just invalid > > the addr value if there is no such register for the board. > > I'm sorry but I didn't get the meaning of your comment. Could you please > rephrase? > > My guess is that you might have tried to say that if there's no register > for rsu_status, mark it not existing in csr map? But the field exists in Yes, this is what I mean, but I see I was wrong. > both cases, it's just part of a different register (doorbell or I was thinking there was no AUTH_RESULT for N3000, sorry for the mistake. > auth_result) so if I use that kind of "register doesn't exist" condition, > it would apply to both cases. > > > > @@ -330,21 +350,20 @@ static enum fw_upload_err rsu_update_init(struct m10bmc_sec *sec) > > > if (ret) > > > return FW_UPLOAD_ERR_RW_ERROR; > > > > > > - ret = regmap_read_poll_timeout(sec->m10bmc->regmap, > > > - csr_map->base + csr_map->doorbell, > > > - doorbell, > > > - rsu_start_done(doorbell), > > > - NIOS_HANDSHAKE_INTERVAL_US, > > > - NIOS_HANDSHAKE_TIMEOUT_US); > > > + ret = read_poll_timeout(m10bmc_sec_progress_status, err, > > > + err < 0 || rsu_start_done(doorbell, progress, status), > > > + NIOS_HANDSHAKE_INTERVAL_US, > > > + NIOS_HANDSHAKE_TIMEOUT_US, > > > + false, > > > + sec, &doorbell, &progress, &status); > > > > > > if (ret == -ETIMEDOUT) { > > > log_error_regs(sec, doorbell); > > > return FW_UPLOAD_ERR_TIMEOUT; > > > - } else if (ret) { > > > + } else if (err) { > > > return FW_UPLOAD_ERR_RW_ERROR; > > > } > > > > > > - status = rsu_stat(doorbell); > > > if (status == RSU_STAT_WEAROUT) { > > > dev_warn(sec->dev, "Excessive flash update count detected\n"); > > > return FW_UPLOAD_ERR_WEAROUT; > > > @@ -393,7 +412,7 @@ static enum fw_upload_err rsu_prog_ready(struct m10bmc_sec *sec) > > > static enum fw_upload_err rsu_send_data(struct m10bmc_sec *sec) > > > { > > > const struct m10bmc_csr_map *csr_map = sec->m10bmc->info->csr_map; > > > - u32 doorbell; > > > + u32 doorbell, status; > > > int ret; > > > > > > ret = regmap_update_bits(sec->m10bmc->regmap, > > > @@ -418,7 +437,10 @@ static enum fw_upload_err rsu_send_data(struct m10bmc_sec *sec) > > > return FW_UPLOAD_ERR_RW_ERROR; > > > } > > > > > > - if (!rsu_status_ok(rsu_stat(doorbell))) { > > > + ret = m10bmc_sys_read(sec->m10bmc, csr_map->rsu_status, &status); > > > > Same as above, please just handle the detailed register definition > > differences in this driver, not in csr map. > > Earlier you were having the exactly opposite opinion: > > https://lore.kernel.org/linux-fpga/20221108144305.45424-1-ilpo.jarvinen@linux.intel.com/T/#me2d20e60d7feeafcdeeab4d58bd82787acf3ada9 Ah, I'm sorry. I was thinking just move one register to another addr at that time. I was not aware that actually the detailed register field definitions are changed in same registers. > > So which way you want it? Should I have the board types here in the sec > update drivers as a second layer of differentiation or not? I think the different register field definitions for the same registers are specific to secure driver. So please differentiate them in secure driver. But with the change, enum m10bmc_type could still be removed, is it? And having the register addr differentiations in m10bmc mfd driver is good to me, cause with a different board type, the register offsets for all subdevs are often globally re-arranged. But I don't want the HW change within a single IP block been specified in m10bmc mfd driver. Thanks, Yilun > > > -- > i.