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[209.85.128.179]) by smtp.gmail.com with ESMTPSA id y1-20020a37f601000000b006fa2b1c3c1esm21753222qkj.58.2023.01.03.04.10.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 03 Jan 2023 04:10:38 -0800 (PST) Received: by mail-yw1-f179.google.com with SMTP id 00721157ae682-4a0d6cb12c5so104363427b3.7; Tue, 03 Jan 2023 04:10:37 -0800 (PST) X-Received: by 2002:a05:690c:c02:b0:48d:1334:6e38 with SMTP id cl2-20020a05690c0c0200b0048d13346e38mr2403543ywb.316.1672747837138; Tue, 03 Jan 2023 04:10:37 -0800 (PST) MIME-Version: 1.0 References: <20221221210917.458537-1-fabrizio.castro.jz@renesas.com> <20221221210917.458537-3-fabrizio.castro.jz@renesas.com> In-Reply-To: From: Geert Uytterhoeven Date: Tue, 3 Jan 2023 13:10:25 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 2/4] mfd: Add RZ/V2M PWC core driver To: Fabrizio Castro Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Sebastian Reichel , Geert Uytterhoeven , Lee Jones , "linux-gpio@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-pm@vger.kernel.org" , Chris Paterson , Biju Das , "linux-renesas-soc@vger.kernel.org" , Laurent Pinchart , Jacopo Mondi Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-1.4 required=5.0 tests=BAYES_00, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Fabrizio, On Tue, Jan 3, 2023 at 1:05 PM Fabrizio Castro wrote: > > From: Geert Uytterhoeven > > On Wed, Dec 21, 2022 at 10:09 PM Fabrizio Castro > > wrote: > > > The External Power Sequence Controller (PWC) IP (found in the > > > RZ/V2M SoC) is a controller for external power supplies (regulators > > > and power switches), and it supports the following features: it > > > generates a power on/off sequence for external power supplies, > > > it generates an on/off sequence for the LPDDR4 core power supply > > > (LPVDD), it comes with General-Purpose Outputs, and it processes > > > key input signals. > > > > Thanks for your patch! > > > > > The PWC is basically a Multi-Function Device (MFD), its software > > > support comes with a core driver, and specialized drivers for > > > its specific features. > > > > I have to admit I'm not such a big fan of MFD. In this driver, > > you are not even sharing resources in the MFD cells, just the mapped > > register base. So I think you can easily save +100 LoC and reduce > > maintenance synchronization overhead across subsystems by just having > > a single non-MFD driver instead. > > > > Did you pick MFD because the PWC poweroff feature depends on board > > wiring, and thus is optional? > > I am not a big fan of MFD, either. > I picked MFD because we were not 100% sure of what the IP could do > when we started working on it. > I have received more information regarding the IP now (which I don't > have the liberty to discuss), I am still not 100% sure that's all > of it, but basically its support may require expansion later on. > > I liked the solution based on syscon and simple-mfd for several reasons, > but having dropped syscon and simple-mfd due to issues with the dt-bindings > I have moved on with a core driver to instantiate the required SW support. > We could of course move to a unified driver if that makes more sense? > If we were to move to unified driver, under which directory would you > suggest we put it? As the GPIO part is larger than the poweroff part, I would put it under drivers/gpio/. Although drivers/soc/renesas/ could be an option, too. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds