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[2620:137:e000::1:20]) by mx.google.com with ESMTP id mp28-20020a1709071b1c00b007ae0ca417e4si29453462ejc.690.2023.01.03.06.10.47; Tue, 03 Jan 2023 06:11:02 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=HjMVrG8s; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237783AbjACOIi (ORCPT + 60 others); Tue, 3 Jan 2023 09:08:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56284 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237787AbjACOIY (ORCPT ); Tue, 3 Jan 2023 09:08:24 -0500 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E01591057A for ; Tue, 3 Jan 2023 06:08:22 -0800 (PST) Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 303B19nq016088; Tue, 3 Jan 2023 15:08:08 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=BakpOF/DNu8pvX2DxGhT1ID4m18yweosmq9XQbEVqS0=; b=HjMVrG8sVXnvxnPTSyVWtyDRj9Zn5Tn2bQ1ZMZWeUeDXyuIpF731nAb+ul9qCNrGr8/0 IHCWL69WiAYb4Ay6cM0CsPSctNW+jlkgVD5f+RTepZ62nLi3aOfu4I3zlAoqxZ493YfD gDIIV8coxfe+baa1hu92joZpWYbC1qkwx8nCQwPRh9hClnxZcDG3aVwnlKIYl1W/OD2q sLUXFXyj1tiaws3odU2HB+Dq7ulDf5r02SNqXa2rxyzygpoB8buWBzeCuvBJUjIqduuF eBes9Q0a3rP6L+jYxRSklZ+wpCj0HZecniY0G9YSwm2VzX5Lrm6q08fUyT8qdAdcGMD+ qA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3mtcupnht6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 03 Jan 2023 15:08:08 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E1F5010002A; Tue, 3 Jan 2023 15:08:07 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id DBBEA224402; Tue, 3 Jan 2023 15:08:07 +0100 (CET) Received: from localhost (10.48.0.157) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.13; Tue, 3 Jan 2023 15:08:06 +0100 From: Patrick Delaunay To: Alexandre TORGUE , Srinivas Kandagatla , Maxime Coquelin CC: Lionel DEBIEVE , Amelie DELAUNAY , Etienne CARRIERE , Fabrice GASNIER , Patrick Delaunay , , , Subject: [PATCH v4 3/3] nvmem: stm32: detect bsec pta presence for STM32MP15x Date: Tue, 3 Jan 2023 15:05:21 +0100 Message-ID: <20230103150515.v4.3.I59210046e368cfc22bd3cca2afe1653674f8ece8@changeid> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230103140521.187678-1-patrick.delaunay@foss.st.com> References: <20230103140521.187678-1-patrick.delaunay@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.48.0.157] X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2023-01-03_04,2023-01-03_02,2022-06-22_01 X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On STM32MP15x SoC, the SMC backend is optional when OP-TEE is used; the PTA BSEC should be used as it is done on STM32MP13x platform, but the BSEC SMC can be also used: it is a legacy mode in OP-TEE, not recommended but used in previous OP-TEE firmware. The presence of OP-TEE is dynamically detected in STM32MP15x device tree and the supported NVMEM backend is dynamically detected: - PTA with stm32_bsec_pta_find - SMC with stm32_bsec_check With OP-TEE but without PTA and SMC detection, the probe is deferred for STM32MP15x devices. On STM32MP13x platform, only the PTA is supported with cfg->ta = true and this detection is skipped. Signed-off-by: Patrick Delaunay --- (no changes since v3) Changes in v3: - use of_find_compatible_node in optee_presence_check function instead of of_find_node_by_path("/firmware/optee") Changes in v2: - Added patch in the serie for BSEC PTA support on STM32MP15x with dynamic detection of OP-TEE presence and SMC support (legacy mode) drivers/nvmem/stm32-romem.c | 33 +++++++++++++++++++++++++++++++-- 1 file changed, 31 insertions(+), 2 deletions(-) diff --git a/drivers/nvmem/stm32-romem.c b/drivers/nvmem/stm32-romem.c index 2edc61925e52..1b90c78301fa 100644 --- a/drivers/nvmem/stm32-romem.c +++ b/drivers/nvmem/stm32-romem.c @@ -159,6 +159,31 @@ static int stm32_bsec_pta_write(void *context, unsigned int offset, void *buf, return stm32_bsec_optee_ta_write(priv->ctx, priv->lower, offset, buf, bytes); } +static bool stm32_bsec_smc_check(void) +{ + u32 val; + int ret; + + /* check that the OP-TEE support the BSEC SMC (legacy mode) */ + ret = stm32_bsec_smc(STM32_SMC_READ_SHADOW, 0, 0, &val); + + return !ret; +} + +static bool optee_presence_check(void) +{ + struct device_node *np; + bool tee_detected = false; + + /* check that the OP-TEE node is present and available. */ + np = of_find_compatible_node(NULL, NULL, "linaro,optee-tz"); + if (np && of_device_is_available(np)) + tee_detected = true; + of_node_put(np); + + return tee_detected; +} + static int stm32_romem_probe(struct platform_device *pdev) { const struct stm32_romem_cfg *cfg; @@ -195,10 +220,14 @@ static int stm32_romem_probe(struct platform_device *pdev) } else { priv->cfg.size = cfg->size; priv->lower = cfg->lower; - if (cfg->ta) { + if (cfg->ta || optee_presence_check()) { rc = stm32_bsec_optee_ta_open(&priv->ctx); /* wait for OP-TEE client driver to be up and ready */ - if (rc) + if (rc == -EPROBE_DEFER) { + /* BSEC PTA is required or SMC not ready */ + if (cfg->ta || !stm32_bsec_smc_check()) + return -EPROBE_DEFER; + } else if (rc) return rc; rc = devm_add_action_or_reset(dev, stm32_bsec_optee_ta_close, priv->ctx); if (rc) { -- 2.25.1